US5313367A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having a multilayer interconnection structure
Assignee: Seiko Epson Corp
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Filing: 1991-06-11
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Granted: 1994-05-17
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Expires: 2011-06-11
Abstract
Abstract Actualized are fingers through which a semiconductor integrated circuit including high density electrode strings can be easily safely mounted on a circuit substrate in the same manner with the prior art. A conductor pattern capable of improving a packaging density of the integrated circuit including the fingers is actualized. The fingers are therefore configured using the multi-layered conductor pattern. The conductor pattern is multi-layered, i.e., consists of conductive layers and an insulating layer for separating these conductive layers. In addition to a wiring pattern serving as fingers for connecting an integrated circuit to a packaging substrate, an electrification path for interlayer connections is also formed in a thickness direction. The circuit substrate exhibiting a high packaging density can be actualized.
Inventors
- 👤 Hisanobu Ishiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 16:07
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/701; H10W46/00; H10W70/00; H10W70/40; H10W70/453; H10W70/60; H10W70/67; H10W70/688; H10W46/601; H10W70/62; H10W70/65; H10W70/654; H10W70/655; H10W72/071; H10W72/072; H10W72/07251; H10W72/077; H10W72/20; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
130 words
A semiconductor device comprising: a multi-layer interconnection structure arranged on a substrate comprising a first layer of first electrically conducting fingers, a second layer of second electrically conducting fingers, and an electrically insulating material arranged between said first and second layers; and a second interconnection structure arranged on the substrate comprising a plurality of third electrically conducting fingers, said first electrically conducting fingers of said multi-layer interconnection structure being in electrical communication with corresponding first electrodes of a first integrated circuit, said second electrically conducting fingers of said multi-layer interconnection structure being in electrical communication with corresponding first electrodes of a second integrated circuit, and said third electrically conducting fingers of said second interconnection structure being in electrical communication with corresponding second electrodes of the first and second integrated circuits.
Claim 2
Dependent Claim
130 words
A semiconductor device comprising: a multi-layer interconnection structure arranged on a substrate comprising a first layer of first electrically conducting fingers, a second layer of second electrically conducting fingers, and an electrically insulating material arranged between said first and second layers; and a second interconnection structure arranged on the substrate comprising a plurality of third electrically conducting fingers, said first electrically conducting fingers of said multi-layer interconnection structure being in electrical communication with corresponding first electrodes of a first integrated circuit, said second electrically conducting fingers of said multi-layer interconnection structure being in electrical communication with corresponding first electrodes of a second integrated circuit, and said third electrically conducting fingers of said second interconnection structure being in electrical communication with corresponding second electrodes of the first and second integrated circuits.
Claim 3
Dependent Claim
27 words
The semiconductor device of claim 1 wherein opposite ends of said first, second and third fingers extend beyond said substrate and are configured in a non-overlapping pattern.
Claim 4
Dependent Claim
26 words
The semiconductor device of claim 1 further comprising an electrically conductive path extending in a thickness-wise direction between and connected to said first and second layers.
Claim 5
Dependent Claim
45 words
The semiconductor device of claim 3 wherein at least one of said first and second fingers on said substrate is connected to said electrically conductive path and through it to one end of a conductor residing in an upper layer of said multi-layer interconnection structure.
Claim 6
Dependent Claim
16 words
The semiconductor device of claim 3 wherein said electrically conductive path comprises an electrically conductive through-hole.
Claim 7
Dependent Claim
16 words
The semiconductor device of claim 3 wherein said electrically conductive path comprises an electrically conductive bump.
Claim 8
Dependent Claim
14 words
The semiconductor device of claim 1 wherein said insulating layer comprises a polyimide layer.
Claim 9
Dependent Claim
18 words
The semiconductor device of claim 1 wherein said insulating layer comprises material deposited between conductive layers by roll-forming.
Claim 10
Dependent Claim
30 words
The semiconductor device of claim 1 further comprising a film-like flexible substrate having a device mounting aperture formed on one surface for receiving said semiconductor substrate which is mounted therein.
Claim 11
Dependent Claim
13 words
The semiconductor device of claim 9 wherein said flexible substrate comprises polyimide tape.
Claim 12
Dependent Claim
18 words
The semiconductor device of claim 9 wherein said insulating layer comprises material deposited between conductive layers by roll-forming.
Claim 13
Dependent Claim
14 words
The semiconductor device of claim 9 wherein said insulating layer comprises a polyimide layer.
Claim 14
Dependent Claim
32 words
The semiconductor device of claim 1 wherein said multi-layered interconnection structure is formed with at least one guidance aperture for use in aligning ends of said conductors said electrodes on said substrate.
Claim 15
Dependent Claim
42 words
The semiconductor device of claim 1, wherein said multi-layer interconnection structure is arranged at a first side of the first and second integrated circuits and said second interconnection structure is arranged at an opposite side of the first and second integrated circuits.
Claim 16
Dependent Claim
34 words
The semiconductor device of claim 14, wherein said first electrically conducting fingers are substantially disposed on a first plane and said second and third electrically conducting fingers are substantially disposed on a second plane.
Claim 17
Dependent Claim
22 words
The semiconductor device of claim 14, wherein said first, second and third fingers are arranged between the first and second integrated circuits.
Claim 18
Dependent Claim
27 words
The semiconductor device of claim 1, wherein said first and second and fingers are arranged such that the first and second integrated circuits are individually accessable, respectively.
Claim 19
Dependent Claim
17 words
The semiconductor device of claim 1, wherein said first fingers are electrically insulated from the second fingers.
References Cited (Backward Citations)
US4051274A
Cited
JPS5284969A
Cited
JPS556852A
Cited
JPS58159361A
Cited
JPS6046040A
Cited
JPS6080232A
Cited
JPS61225825A
Cited
JPS6267828A
Cited
JPS62158339A
Cited
JPS6352461A
Cited
JPS63164229A
Cited
US5021866A
Cited
JPH01108934A
Cited
EP0343400A2
Cited
JPH01303730A
Cited
JPH02142151A
Cited
US4912547A
Cited
EP0461639A2
Cited
EP0474224A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-16 | 1997-11-15 | 1998-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-16 | 2001-11-15 | 2002-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-16 | 2005-11-15 | 2006-05-17 | $7700.00 | Window Closed / Lapsed |