Multilayer interconnection structure for a semiconductor device

Claim 1

An interconnection structure of a semiconductor device having multilayer interconnection layers connected through a connection hole, comprising: a first interconnection layer, an insulating layer formed on said first interconnection layer having a through hole reaching the surface of said first interconnection layer, and a second interconnection layer formed on said insulating layer, electrically connected to said first interconnection layer through said through hole, wherein said first interconnection layer comprises a first conductive layer containing aluminum or an aluminum alloy, a second conductive layer formed on said first conductive layer, said second conductive layer comprising a material selected from the group consisting of tungsten, tungsten silicide and molybdenum silicide, and a third conductive layer formed on said second conductive layer, wherein said second interconnection layer further comprises a main conductive layer which becomes a main portion of said second interconnection layer, a first titanium nitride containing layer formed on said main conductive layer, a second titanium nitride containing layer formed beneath said main conductive layer, and a titanium containing layer formed beneath said second titanium nitride containing layer, having contact with said second conductive layer through said through hole, wherein the etching speed of said second conductive layer is less than that of said third conductive layer under condition of etching said insulating layer with a selected etchant, and further wherein light reflectivity of said third conductive layer is less than that of said second conductive layer.