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JPS6480065A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Hitachi Ltd
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Filing: 1987-09-19
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Granted: —
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Expires: 2007-09-19
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Abstract

Abstract PURPOSE:To contrive improvement in information holding characteristics by a method wherein, in a DRAM memory cell, the semiconductor region on the side where the information storing capacitor of a cell selecting FET is connected, is composed of the material into which low impurity concn. ions are implanted. CONSTITUTION:A DRAM memory cell M is composed of the MISFETQs for memory cell selection and the information memorizing capacitor C of stacked structure, and MISFETQn and Qp constituting a circumferential circuit are formed on the same substrate. Then, the semiconductor region 9 on the side where the capacitor C of said FETQs will be connected is composed of the region into which ions of the impurity concn. lower than that of the semiconductor region 17 of the FETQn, constituting the circumferential circuit, are implanted. As a result, the leak of accumulated load is reduced, and the information holding characteristics of the DRAM can be improved.

Inventors

  • 👤 Jun Murata
  • 👤 Yoshitaka Tadaki

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 08:41
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31

Claims Analysis

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References Cited (Backward Citations)

JPS62224076A Cited

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