US5311146A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current mirror for low supply voltage operation
Assignee: Vermont Technical College
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Filing: 1993-01-26
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Granted: 1994-05-10
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Expires: 2013-01-26
Abstract
Abstract The present invention is an improved current mirror circuit. This improved current mirror circuit includes first and second transistors of the same conductivity type and have bases connected together. The first transistor is connected between a first supply terminal and an input terminal. The second transistor is connected between a first supply terminal and an output terminal. Included is a feedback circuit for providing a voltage feedback between the input terminal and the bases of the first and second transistors. Also included is a bias circuit for providing a bias current to the feedback circuit that is based on the input current.
Inventors
- 👤 Craig M. Brannon
- 👤 Tuan V. Ngo
- 👤 John J. Price, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 03:14
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
128 words
An improved current mirror circuit comprising: an input terminal having an input current and an input voltage associated therewith; an output terminal having an output current associated therewith; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminals, and with the second transistor being connected between the first supply terminal and the output terminal; feedback means including third and fourth transistors of different conductivity types connected between the input terminals and the bases of the first and second transistors for providing feedback therebetween; and bias current means responsive to the input current for providing bias current to the feedback means based on the input current.
Claim 2
Dependent Claim
128 words
An improved current mirror circuit comprising: an input terminal having an input current and an input voltage associated therewith; an output terminal having an output current associated therewith; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminals, and with the second transistor being connected between the first supply terminal and the output terminal; feedback means including third and fourth transistors of different conductivity types connected between the input terminals and the bases of the first and second transistors for providing feedback therebetween; and bias current means responsive to the input current for providing bias current to the feedback means based on the input current.
Claim 3
Dependent Claim
33 words
The improved current mirror circuit of claim 1 wherein the third transistor is connected between the first and second supply terminals with the base of the third transistor connected to the input terminal.
Claim 4
Dependent Claim
24 words
The improved current mirror circuit of claim 2 wherein the bias current means is connected to the third transistor for providing bias current thereto.
Claim 5
Dependent Claim
62 words
The improved current mirror circuit of claim 1 wherein the third transistor is connected between the first and second supply terminals and has a base connected to the input terminal, and the fourth transistor is connected between the bases of the first and second transistors and the second supply terminal and has a base connected to the emitter of the third transistor.
Claim 6
Dependent Claim
32 words
The improved current mirror circuit of claim 1 wherein the bias current means is a current mirror circuit that provides bias current that is related to a current in the first transistor.
Claim 7
Dependent Claim
41 words
The improved current mirror circuit of claim 1 wherein the input current passes between the input terminal and the second supply terminal and wherein a voltage between the input terminal and the first supply terminal is less than two diode drops.
Claim 8
Dependent Claim
30 words
The improved current mirror circuit of claim 1 wherein a voltage between the input terminal and the bases of the first and second transistors is less than one diode drop.
Claim 9
Dependent Claim
25 words
The improved current mirror circuit of claim 1 wherein the bias current means provides bias current to the feedback means proportional to the input current.
Claim 10
Dependent Claim
136 words
An improved current mirror circuit comprising: an input terminal having an input current and an input voltage associated therewith; an output terminal having an output current associated therewith; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminal, and with the second transistor being connected between the first supply terminal and the output terminal; a feedback circuit including a third transistor having a control terminal and a pair of controlled terminals with the controlled terminals being connected between the first and second supply terminals and with the control terminal connected to the input terminal; and a current mirror bias circuit for providing bias current in the third transistor based on the input current.
Claim 11
Dependent Claim
136 words
An improved current mirror circuit comprising: an input terminal having an input current and an input voltage associated therewith; an output terminal having an output current associated therewith; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminal, and with the second transistor being connected between the first supply terminal and the output terminal; a feedback circuit including a third transistor having a control terminal and a pair of controlled terminals with the controlled terminals being connected between the first and second supply terminals and with the control terminal connected to the input terminal; and a current mirror bias circuit for providing bias current in the third transistor based on the input current.
Claim 12
Dependent Claim
39 words
The improved current mirror circuit of claim 9 wherein the current mirror bias circuit is connected between the first and second supply terminals for providing bias current in the third transistor based on base current in the first transistor.
Claim 13
Dependent Claim
77 words
The improved current mirror circuit of claim 10 wherein the third transistor is of a first conductivity type with the feedback circuit further including a fourth transistor having a second conductivity type with the fourth transistor having a control terminal and a pair of controlled terminals and with the controlled terminals being connected between the first and second supply terminals and with the control terminal being connected to one of the controlled terminals of the third transistor.
Claim 14
Dependent Claim
41 words
The improved current mirror circuit of claim 9 wherein the input current passes between the input terminal and the second supply terminal and wherein a voltage between the input terminal and the first supply terminal is less than two diode drops.
Claim 15
Dependent Claim
130 words
An improved current mirror circuit comprising: an input terminal; an output terminal; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminal, and with the second transistor being connected between the first supply terminal and the output terminal; a third transistor connected between the first and second supply terminals and having a base connected to the input terminal; a fourth transistor connected between the bases of the first and second transistors and the second supply terminal and having a base connected to an emitter of the third transistor; and current mirror means for providing a current in the third transistor based on current in the first transistor.
Claim 16
Dependent Claim
130 words
An improved current mirror circuit comprising: an input terminal; an output terminal; first and second supply terminals; first and second transistors of the same conductivity type having bases connected together with the first transistor being connected between the first supply terminal and the input terminal, and with the second transistor being connected between the first supply terminal and the output terminal; a third transistor connected between the first and second supply terminals and having a base connected to the input terminal; a fourth transistor connected between the bases of the first and second transistors and the second supply terminal and having a base connected to an emitter of the third transistor; and current mirror means for providing a current in the third transistor based on current in the first transistor.
Claim 17
Dependent Claim
17 words
The improved current mirror circuit of claim 13 wherein the first and second transistors are PNP transistors.
Claim 18
Dependent Claim
34 words
The improved current mirror circuit of claim 13 wherein the third transistor is an NPN transistor having a collector connected to the first supply terminal and an emitter connected to the current mirror means.
Claim 19
Dependent Claim
31 words
The improved current mirror circuit of claim 13 further including a diode having a cathode connected to the input terminal and an anode connected to the base of the first transistor.
Claim 20
Dependent Claim
23 words
The improved current mirror circuit of claim 13 further including a first resistor connected between the first supply terminal and the first transistor.
Claim 21
Dependent Claim
23 words
The improved current mirror circuit of claim 13 further including a second resistor connected between the first supply terminal and the second transistor.
Claim 22
Dependent Claim
89 words
The improved current mirror circuit of claim 13 wherein the current mirror means further includes: a fifth transistor connected between the first and second supply terminals and having a base connected to the base of the first transistor; a sixth transistor connected between the second supply terminal and the fifth transistor with the collector and the base of the sixth transistor connected together; and a seventh transistor connected between the second supply terminal and the third transistor and having a base connected to the base of the sixth transistor.
Claim 23
Dependent Claim
23 words
The current mirror means of claim 19 and further including a first resistor connected between the fifth transistor and the first supply terminal.
Claim 24
Dependent Claim
22 words
The current mirror means of claim 19 and further including a resistor connected between the second supply terminal and the sixth transistor.
Claim 25
Dependent Claim
22 words
The current mirror means of claim 19 and further including a resistor connected between the second supply terminal and the seventh transistor.
Claim 26
Dependent Claim
26 words
The improved current mirror circuit of claim 13 and further including a first capacitor connected between the input terminal and the base of the first transistor.
Claim 27
Dependent Claim
24 words
The improved current mirror circuit of claim 23 and further including a second capacitor connected between the input terminal and the first supply terminal.
Claim 28
Dependent Claim
41 words
The improved current mirror circuit of claim 13 wherein the input current passes between the input terminal and the second supply terminal and wherein a voltage between the input terminal and the first supply terminal is less than two diode drops.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-09 | 1997-11-08 | 1998-05-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-09 | 2001-11-08 | 2002-05-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-09 | 2005-11-08 | 2006-05-10 | $7700.00 | Window Closed / Lapsed |