Patent US5274270A successfully refreshed from Google Patents.
US5274270A
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Multichip module having SiO2 insulating layer
Assignee: nCHIP Inc
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Filing: 1993-01-22
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Granted: 1993-12-28
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Expires: 2013-01-22
Abstract
Abstract A multichip module for interconnecting a plurality of integrated circuits. A thick layer of silicon dioxide, up to 20 μm, serves as a dielectric to separate metal signal layers from power and ground planes The silicon dioxide layer is deposited to have a residual compressive stress of less than 2×10 9 dynes/cm 2 , and preferably less than 1×10 9 dynes/cm 2 , to prevent cracking.
Inventors
- 👤 David B. Tuckerman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 05:18
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/601; H05; H05K; H05K1/00; H05K1/16; H10W72/00; H10W72/50; H10W72/531; H10W72/5363; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
43 words
An insulating layer for insulating a metal signal layer from a conducting plane in a multichip module comprising: a silicon dioxide layer having a residual compressive stress of less than 2×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 2
Dependent Claim
43 words
An insulating layer for insulating a metal signal layer from a conducting plane in a multichip module comprising: a silicon dioxide layer having a residual compressive stress of less than 2×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 3
Dependent Claim
43 words
An insulating layer for insulating a metal signal layer from a power supply in a multichip module comprising: a silicon dioxide layer having a residual compressive stress of less than 1×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 4
Dependent Claim
43 words
An insulating layer for insulating a metal signal layer from a power supply in a multichip module comprising: a silicon dioxide layer having a residual compressive stress of less than 1×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 5
Dependent Claim
58 words
A multichip module for interconnecting a plurality of integrated circuits comprising: a support base; a conducting plane; a metal signal layer; and a silicon dioxide insulating layer for insulating said metal signal layer from said power supply, having a residual compressive stress of less than 2×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 6
Dependent Claim
58 words
A multichip module for interconnecting a plurality of integrated circuits comprising: a support base; a conducting plane; a metal signal layer; and a silicon dioxide insulating layer for insulating said metal signal layer from said power supply, having a residual compressive stress of less than 2×10 9 dynes/cm 2 and a thickness between 5 and 20 microns inclusive.
Claim 7
Dependent Claim
20 words
The multichip module of claim 3 wherein said residual compressive stress is less than approximately 1×10 9 dynes/cm 2 .
Claim 8
Dependent Claim
18 words
The multichip module of claim 3 wherein said conducting plane comprises: a power plane; and a ground plane.
Claim 9
Dependent Claim
21 words
The multichip module of claim 5 wherein said conducting plane further comprises: a dielectric disposed between said power and ground planes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-27 | 1997-06-28 | 1997-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-27 | 2001-06-28 | 2001-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-27 | 2005-06-28 | 2005-12-28 | $7700.00 | Window Closed / Lapsed |