Method and apparatus for switching between gain curves of a voltage controlled oscillator

Claim 2

A voltage controlled oscillator circuit, comprising: a ring oscillator; first gain curve means, coupled to said ring oscillator, for causing said ring oscillator to have a first gain curve; second gain curve means, coupled to said ring oscillator, for causing said ring oscillator to have a second gain curve; and a gain control signal, coupled to said first gain curve means, said gain control signal enabling said first gain curve means when said gain control signal is in a first logic state, and said gain control signal enabling said second gain curve means when said gain control signal is in a second logic state.

Claim 3

A circuit as in claim 1, further comprising: a detect circuit, coupled to said first gain curve means, said detect circuit providing said gain control signal.

Claim 4

A circuit as in claim 1, wherein a maximum frequency of the second gain curve occurs at a bias voltage value between a predetermined minimum bias voltage and a predetermined maximum bias voltage.

Claim 5

A circuit as in claim 1, further comprising: means for providing an output signal, said means for providing the output signal being coupled to said ring oscillator; and an enable signal, coupled to said means for providing the output signal, said enable signal enabling said means for providing the output signal when said enable signal is in a first logic state, and said enable signal disabling said means for providing the output signal when said enable signal is in a second logic state.

Claim 6

A circuit as in claim 1, further comprising: a bias voltage signal, coupled to said second gain curve means, said bias voltage signal affecting a resistance value of said second gain curve means.

Claim 7

A circuit as in claim 1, wherein said first gain curve means further comprises: a first resistive element having a first current electrode coupled to said ring oscillator and having a second current electrode.

Claim 8

A circuit as in claim 6, wherein the second current electrode of said first resistive element is coupled to ground.

Claim 9

A circuit as in claim 6, wherein said first resistive element is a transistor.

Claim 10

A circuit as in claim 7, wherein said second gain curve means further comprises: a second resistive element having a first current electrode coupled to said ring oscillator and having a second current electrode coupled to ground.

Claim 11

A circuit as in claim 9, wherein said first resistive element is a transistor and said second resistive element is a transistor.

Claim 14

A method as in claim 11, the method further comprising the step of: providing a bias voltage to the voltage controlled oscillator circuit.

Claim 15

A method as in claim 11, the method further comprising the step of: providing the output signal external to the voltage controlled oscillator circuit when an enable signal is asserted.

Claim 16

A voltage controlled oscillator circuit, comprising: a first oscillator stage, comprising: a first transistor having a first current electrode coupled to a first power supply voltage level, having a second current electrode, and having a control electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, and having a second current electrode; a third transistor having a first current electrode coupled to the second current electrode of the second transistor, and having a second current electrode; a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, having a second current electrode coupled to a second power supply voltage level, and having a control electrode; a fifth transistor having a first current electrode coupled to the first current electrode of said fourth transistor, and having a control electrode; a gain control signal coupled to the control electrode of said fourth transistor; and a bias voltage coupled to the control electrode of said fifth transistor and coupled to the control electrode of said first transistor.

Claim 17

A voltage controlled oscillator circuit, comprising: a first oscillator stage, comprising: a first transistor having a first current electrode coupled to a first power supply voltage level, having a second current electrode, and having a control electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, and having a second current electrode; a third transistor having a first current electrode coupled to the second current electrode of the second transistor, and having a second current electrode; a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, having a second current electrode coupled to a second power supply voltage level, and having a control electrode; a fifth transistor having a first current electrode coupled to the first current electrode of said fourth transistor, and having a control electrode; a gain control signal coupled to the control electrode of said fourth transistor; and a bias voltage coupled to the control electrode of said fifth transistor and coupled to the control electrode of said first transistor.

Claim 18

A circuit as in claim 14, wherein said gain control signal selects a first gain curve when said gain control signal is in a first logic state, and said gain control signal selects a second gain curve when said gain control signal is in a second logic state.

Claim 19

A circuit as in claim 14, wherein said first transistor is a p-channel field effect transistor, said second transistor is a p-channel field effect transistor, said third transistor is an n-channel field effect transistor, said fourth transistor is an n-channel field effect transistor, and said fifth transistor is an n-channel field effect transistor.

Claim 20

A circuit as in claim 14, further comprising: a second oscillator stage coupled to said first oscillator stage.

Claim 21

A circuit as in claim 17, wherein said second oscillator stage is identical to said first oscillator stage.

Claim 22

A circuit as in claim 17, further comprising: a third oscillator stage coupled to said second oscillator stage, for receiving an enable signal and for providing an oscillating output signal when the enable signal is in a first logic state.

Claim 23

A circuit as in claim 19, wherein said third oscillator stage is coupled to said first oscillator stage through a feedback path.