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US5260170A Expired / Lapsed US ⏱️ 0.0 years remaining

Dielectric layered sequentially processed circuit board

Assignee: Motorola Solutions Inc
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Filing: 1990-01-08
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Granted: 1993-11-09
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Expires: 2010-01-08
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Abstract

Abstract A dielectric layered sequentially processed circuit board is disclosed. A first photodefinable resin containing an electroless plating catalyst is disposed on a substrate and portions of the substrate are exposed through the first resin. A second photodefinable resin absent the electroless plating catalyst is disposed on the first resin, and portions coincident with the exposed portions of the substrate as well as portions of the first resin are exposed through the second resin. A conductive material is deposited on the exposed portions of the substrate and the exposed portions of the first resin.

Inventors

  • 👤 Vernon L. Brown

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 15:57
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/465; G; G03; G03F; G03F7/00; G03F7/002; G03F7/0035; H05K3/4661; H05K2201/00; H05K2201/02; H05K2201/0203; H05K2201/0206; H05K2201/0236; H05K2201/03; H05K2201/0332; H05K2201/0364; H05K2201/0376; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09563; H05K2203/00; H05K2203/11; H05K2203/1157; H05K2203/12; H05K2203/125; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/10; H05K3/18; H05K3/181; H05K3/182; H05K3/184

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 131 words
A method for fabricating an additive process printed circuit comprising the steps of: applying a first photodefinable resin containing an electroless plating catalyst to a substrate surface; defining and developing a first image in said first photodefinable resin whereby portions of said substrate surface are exposed; applying, a second photodefinable resin which does not contain an electroless plating catalyst to said first photodefinable resin and said exposed portions of said substrate surface: defining and developing a second image in said second photodefinable resin in portions at least partially coincident with said first image whereby at least portions of said exposed portions of said substrate surface are reexposed; and depositing a conductive material on said reexposed portions of said substrate surface and on said first photodefinable resin coincident with said second image.
Claim 2
Independent Claim 131 words
A method for fabricating an additive process printed circuit comprising the steps of: applying a first photodefinable resin containing an electroless plating catalyst to a substrate surface; defining and developing a first image in said first photodefinable resin whereby portions of said substrate surface are exposed; applying, a second photodefinable resin which does not contain an electroless plating catalyst to said first photodefinable resin and said exposed portions of said substrate surface: defining and developing a second image in said second photodefinable resin in portions at least partially coincident with said first image whereby at least portions of said exposed portions of said substrate surface are reexposed; and depositing a conductive material on said reexposed portions of said substrate surface and on said first photodefinable resin coincident with said second image.
Claim 3
Dependent Claim 49 words
A method in accordance with the method of claim 1 wherein said step of defining and developing a second image further comprises the step of defining and developing said second image in said second photodefinable resin in portions which are not at least partially coincident with said first image.
Claim 4
Dependent Claim 147 words
A method in accordance with the method of claim 1 further comprising the steps of: applying a third photodefinable resin containing an electroless plating catalyst to said deposited conductive material and said second photodefinable resin; defining and developing a third image in said third photodefinable resin whereby portions of said deposited conductive material are exposed; applying a fourth photodefinable resin which does not contain an electroless plating catalyst to said third photodefinable resin and said exposed portions of said deposited conductive material; defining and developing a fourth image in said fourth photodefinable resin in portions at least partially coincident with said third image whereby at least portions of said exposed portions of said deposited conductive material and said third photodefinable resin are reexposed; and depositing a conductive material on said reexposed portions of said deposited conductive material and said third photodefinable resin coincident with said fourth image.
Claim 5
Dependent Claim 26 words
A method in accordance with the method of claim 1 further comprising the step of applying a third resin to a second surface of said substrate.

References Cited (Backward Citations)

US3424854A Cited
US4572764A Cited
US4902610A Cited
US4910072A Cited
US4748104A Cited
US4737446A Cited
US4859571A Cited
US4948707A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-08 1997-05-10 1997-11-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-08 2001-05-10 2001-11-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-08 2005-05-10 2005-11-09 $7700.00 Window Closed / Lapsed

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