Method of fabricating a BiCMOS device having closely spaced contacts

Claim 1

A method for forming a transistor device, comprising: providing a silicon substrate; forming at least a first buried doped layer in said substrate; forming a first polysilicon layer on the surface of said substrate; removing selected portions of said first polysilicon layer to pattern said layer so as to provide a first polysilicon region on said substrate in the area above said first buried layer, said first polysilicon region having a upper surface and first and second sidewall surfaces; doping said first polysilicon region; annealing said substrate; implanting portions of said substrate to form source and drain regions for a field effect device; depositing spacer oxide over substantially the entire surface of said substrate and said first polysilicon region; dry-etching said oxide to remove selected portions of said oxide, leaving layers of oxide adjacent said first and second sidewalls of said first polysilicon regions; depositing a second polysilicon layer over substantially the entire surface of said substrate and said first polysilicon region following said step of implanting; depositing a planarizing layer; dry-etching the upper surface of said deposited polysilicon and said planarizing layers; wet-etching the upper surface of said deposited polysilicon layer to provide said second polysilicon layer extending to said first and second spacers wherein said second polysilicon layer is separated from said first polysilicon region only by said first and second spacers; masking and etching said second polysilicon layer to remove selected portions thereof for providing desired patterning following said step of depositing a planarizing layer; forming a coating, said coating extending over both said upper surface of said first polysilicon region and at least a portion of the upper surface of said second polysilicon layer, said coating comprising a refractory metal, said step of forming a coating being conducted after said step of masking and etching said second polysilicon layer and after said step of implanting; reacting said metal with adjacent polysilicon to produce a layer of silicide covering at least a portion of said upper portion of said first polysilicon region and at least a portion of said second polysilicon layer and extending up to said first and second spacers; and removing unreacted portions of said refractory metal.

Claim 2

A method for forming a transistor device, comprising: providing a silicon substrate; forming at least a first buried doped layer in said substrate; forming a first polysilicon layer on the surface of said substrate; removing selected portions of said first polysilicon layer to pattern said layer so as to provide a first polysilicon region on said substrate in the area above said first buried layer, said first polysilicon region having a upper surface and first and second sidewall surfaces; doping said first polysilicon region; annealing said substrate; implanting portions of said substrate to form source and drain regions for a field effect device; depositing spacer oxide over substantially the entire surface of said substrate and said first polysilicon region; dry-etching said oxide to remove selected portions of said oxide, leaving layers of oxide adjacent said first and second sidewalls of said first polysilicon regions; depositing a second polysilicon layer over substantially the entire surface of said substrate and said first polysilicon region following said step of implanting; depositing a planarizing layer; dry-etching the upper surface of said deposited polysilicon and said planarizing layers; wet-etching the upper surface of said deposited polysilicon layer to provide said second polysilicon layer extending to said first and second spacers wherein said second polysilicon layer is separated from said first polysilicon region only by said first and second spacers; masking and etching said second polysilicon layer to remove selected portions thereof for providing desired patterning following said step of depositing a planarizing layer; forming a coating, said coating extending over both said upper surface of said first polysilicon region and at least a portion of the upper surface of said second polysilicon layer, said coating comprising a refractory metal, said step of forming a coating being conducted after said step of masking and etching said second polysilicon layer and after said step of implanting; reacting said metal with adjacent polysilicon to produce a layer of silicide covering at least a portion of said upper portion of said first polysilicon region and at least a portion of said second polysilicon layer and extending up to said first and second spacers; and removing unreacted portions of said refractory metal.