Method of manufacturing pn-junction device II-VI compound semiconductor

Claim 1

A method of manufacturing a pn-junction device characterized in that the method comprises the steps of: forming a buffer layer of II-VI group compound semiconductor on a crystalline substrate, stacking on the buffer layer, pairs of superlattice layer comprising a II-VI group compound semiconductor layer and a acceptor impurity-doped II-VI group compound semiconductor endowed with forbidden band width layer larger than that of the II-VI group compound semiconductor, forming, on the superlattice layers, a protection layer with desired pattern, etching the surface of the superlattice layers not covered by the protection layer in a discharging atmosphere of gas containing one or more of halogen elements and having pressure below 50 mTorr for the first time to expose a portion of said buffer layer, said etching producing a damaged layer on said etched surface, etching said damaged layer in a discharging atmosphere of gas containing one or more of halogen elements and having pressure of 50 to 70 mTorr for the second time, removing the protection layer, forming a donor impurity-doped II-VI group compound semiconductor layer above a portion of the buffer layer from which the superlattice layer is etched off and above a portion of the buffer layer from which the superlattice layer is not etched off, covering with a further protection layer the donor impurity-doped II-VI group compound semiconductor formed above the portion of the buffer layer from which the superlattice is etched off, etching the donor impurity-doped II-VI group compound semiconductor layer not covered by the further protection layer in a discharging atmosphere of gas containing one or more of halogen elements and removing the further protection layer.

Claim 2

A method of manufacturing a pn-junction device characterized in that the method comprises the steps of: forming a buffer layer of II-VI group compound semiconductor on a crystalline substrate, stacking on the buffer layer, pairs of superlattice layer comprising a II-VI group compound semiconductor layer and a acceptor impurity-doped II-VI group compound semiconductor endowed with forbidden band width layer larger than that of the II-VI group compound semiconductor, forming, on the superlattice layers, a protection layer with desired pattern, etching the surface of the superlattice layers not covered by the protection layer in a discharging atmosphere of gas containing one or more of halogen elements and having pressure below 50 mTorr for the first time to expose a portion of said buffer layer, said etching producing a damaged layer on said etched surface, etching said damaged layer in a discharging atmosphere of gas containing one or more of halogen elements and having pressure of 50 to 70 mTorr for the second time, removing the protection layer, forming a donor impurity-doped II-VI group compound semiconductor layer above a portion of the buffer layer from which the superlattice layer is etched off and above a portion of the buffer layer from which the superlattice layer is not etched off, covering with a further protection layer the donor impurity-doped II-VI group compound semiconductor formed above the portion of the buffer layer from which the superlattice is etched off, etching the donor impurity-doped II-VI group compound semiconductor layer not covered by the further protection layer in a discharging atmosphere of gas containing one or more of halogen elements and removing the further protection layer.