Semiconductor device having punch-through protected buried contacts and method for making the same

Claim 1

A method for forming a semiconductor device comprising: providing a semiconductor device region of a first conductivity type having a principal surface and having a first and second active regions therein separated by an isolation region; forming subsurface punch-through prevention regions of the first conductivity type in selected portions of the first and second active regions; forming a doped conductive layer having a portion in intimate contact with the principle surface; and forming doped contact regions of a second conductivity type in the first and second active regions adjacent to the isolation region extending from the principle surface to the subsurface punch-through prevention regions wherein the subsurface punch-through prevention regions surround a lower portion of the doped contact regions and are separated from the principle surface by the doped contact regions.

Claim 2

A method for forming a semiconductor device comprising: providing a semiconductor device region of a first conductivity type having a principal surface and having a first and second active regions therein separated by an isolation region; forming subsurface punch-through prevention regions of the first conductivity type in selected portions of the first and second active regions; forming a doped conductive layer having a portion in intimate contact with the principle surface; and forming doped contact regions of a second conductivity type in the first and second active regions adjacent to the isolation region extending from the principle surface to the subsurface punch-through prevention regions wherein the subsurface punch-through prevention regions surround a lower portion of the doped contact regions and are separated from the principle surface by the doped contact regions.

Claim 5

A method for forming a semiconductor device comprising: providing a semiconductor device region of a first conductivity type having a principal surface and having a first and second active regions therein separated by an isolation region; forming a dielectric layer overlying the first and second active regions; forming a patterned mask layer overlying the semiconductor device region having openings aligned to a portion of the first and second active regions adjacent to the isolation region; introducing a dopant of the first conductivity type into the first and second active regions through the openings to form subsurface punch-through prevention regions in the active device region; etching contact openings in the dielectric layer using the openings of the mask layer as etch masks to expose the active region; forming a conductive layer overlying semiconductor device region and extending into the contact openings to contact the principle surface; and diffusing dopant atoms of a second conductivity type from the conductive layer into the active region to form contact regions separating the punch-through prevention regions from the principle surface.

Claim 6

A method for forming a semiconductor device comprising: providing a semiconductor device region of a first conductivity type having a principal surface and having a first and second active regions therein separated by an isolation region; forming a dielectric layer overlying the first and second active regions; forming a patterned mask layer overlying the semiconductor device region having openings aligned to a portion of the first and second active regions adjacent to the isolation region; introducing a dopant of the first conductivity type into the first and second active regions through the openings to form subsurface punch-through prevention regions in the active device region; etching contact openings in the dielectric layer using the openings of the mask layer as etch masks to expose the active region; forming a conductive layer overlying semiconductor device region and extending into the contact openings to contact the principle surface; and diffusing dopant atoms of a second conductivity type from the conductive layer into the active region to form contact regions separating the punch-through prevention regions from the principle surface.

Claim 9

A method for forming a semiconductor device: providing a n-type single crystal silicon substrate having an p-type well region formed therein, the well region having a principal surface; forming a field oxide region in the well region separating the well region into first and second active regions; oxidizing the principle surface to form a dielectric layer overlying the first and second active regions; forming a photoresist mask layer overlying the semiconductor well region having openings aligned to a portion of the first and second active regions adjacent to the field oxide region; implanting boron atoms at an energy of about 160 to 260 KeV and a dose of about 1×10 12 to 1×10 14 ions per square centimeter into the first and second active regions through the openings to form substrate punch-through prevention regions at a depth of about 250 to 350 nanometers in the well region; etching contact openings in the dielectric layer using the openings in the photoresist mask layer as etch masks to expose a portion of the principle surface; removing the photoresist mask layer; forming a phosphorous-doped polysilicon layer to overlie at least a portion of the field oxide layer and having a portion thereof extending into at least one of the openings to contact the principle surface; and diffusing phosphorus atoms from the polysilicon layer into the active region to form doped contact regions separating the punch-through prevention regions from the principle surface.

Claim 10

A method for forming a semiconductor device: providing a n-type single crystal silicon substrate having an p-type well region formed therein, the well region having a principal surface; forming a field oxide region in the well region separating the well region into first and second active regions; oxidizing the principle surface to form a dielectric layer overlying the first and second active regions; forming a photoresist mask layer overlying the semiconductor well region having openings aligned to a portion of the first and second active regions adjacent to the field oxide region; implanting boron atoms at an energy of about 160 to 260 KeV and a dose of about 1×10 12 to 1×10 14 ions per square centimeter into the first and second active regions through the openings to form substrate punch-through prevention regions at a depth of about 250 to 350 nanometers in the well region; etching contact openings in the dielectric layer using the openings in the photoresist mask layer as etch masks to expose a portion of the principle surface; removing the photoresist mask layer; forming a phosphorous-doped polysilicon layer to overlie at least a portion of the field oxide layer and having a portion thereof extending into at least one of the openings to contact the principle surface; and diffusing phosphorus atoms from the polysilicon layer into the active region to form doped contact regions separating the punch-through prevention regions from the principle surface.