US5179705A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Asynchronous arbiter state machine for arbitrating between operating devices requesting access to a shared resource
Assignee: 3DLabs Ltd
•
Filing: 1991-11-14
•
Granted: 1993-01-12
•
Expires: 2011-11-14
Abstract
Abstract A system has a shared resource, such as a bus or memory, with which various devices may communicate upon a request being granted by an arbiter. In order to reduce the arbitration time, the arbiter is comprised of a state machine and latch which run asynchronously. Consequently, once one request has been granted and acted upon, the state machine will commence arbitration for any remaining requests.
Inventors
- 👤 Osman Kent
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:06
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/362; G06F13/364
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
370 words
An arbitration system comprising: a resource; a plurality of operating means connected to said resource, each of said operating means having an output for providing a respective one of a plurality of first resource request signals to request and maintain access to said resource and having an input for receiving a respective one of a plurality of grant signals, each of said operating means accessing said resource in response to receiving the respective grant signal for said each operating means; latch means having a plurality of signal inputs, a corresponding plurality of signal outputs, and a control input, each of said signal inputs receiving a respective one of said first resource request signals, said control input receiving a control signal, and each of said signal outputs providing a respective one of a plurality of second resource request signals; said latch means for providing said first resource request signals received by said signal inputs to said signal outputs as said second resource request signals and for latching said second resource request signals in response to said control signal; and an asynchronous state machine having a plurality of inputs each receiving a respective one of said first and second resource request signals, a plurality of outputs for providing said grant signals to said plurality of said operating means, and a control output providing said control signal to said latch means, said state machine further comprising: first means for providing said control signal to receive said second resource request signals from said latch means, second means for providing said control signal in response to receiving at least one of said first and second resource request signals to latch said second resource request signals in said latch means, third means for arbitrating among said second resource request signals received from said latch means to select one of said operating means, fourth means for providing the respective one of said grant signals for said selected operating means, and fifth means for providing said control signal to enable said latch means to receive said first resource request signals and to provide said second resource request signals when the respective one of said first resource request signals for said selected operating means ceases to request said resource.
Claim 2
Dependent Claim
370 words
An arbitration system comprising: a resource; a plurality of operating means connected to said resource, each of said operating means having an output for providing a respective one of a plurality of first resource request signals to request and maintain access to said resource and having an input for receiving a respective one of a plurality of grant signals, each of said operating means accessing said resource in response to receiving the respective grant signal for said each operating means; latch means having a plurality of signal inputs, a corresponding plurality of signal outputs, and a control input, each of said signal inputs receiving a respective one of said first resource request signals, said control input receiving a control signal, and each of said signal outputs providing a respective one of a plurality of second resource request signals; said latch means for providing said first resource request signals received by said signal inputs to said signal outputs as said second resource request signals and for latching said second resource request signals in response to said control signal; and an asynchronous state machine having a plurality of inputs each receiving a respective one of said first and second resource request signals, a plurality of outputs for providing said grant signals to said plurality of said operating means, and a control output providing said control signal to said latch means, said state machine further comprising: first means for providing said control signal to receive said second resource request signals from said latch means, second means for providing said control signal in response to receiving at least one of said first and second resource request signals to latch said second resource request signals in said latch means, third means for arbitrating among said second resource request signals received from said latch means to select one of said operating means, fourth means for providing the respective one of said grant signals for said selected operating means, and fifth means for providing said control signal to enable said latch means to receive said first resource request signals and to provide said second resource request signals when the respective one of said first resource request signals for said selected operating means ceases to request said resource.
Claim 3
Dependent Claim
118 words
A system as claimed in claim 1, wherein said state machine operates cyclicly based on a plurality of states, said states including an initial state, a decision state, and a plurality of grant states, each of said grant states corresponding to a respective one of said operating means, and further wherein: said first means provides said control signal and said fifth means provides said control signal in said initial state; said second means provides said control signal and said third means selects one of said operating means in said decision state; and said fourth means provides the respective one of said grant signals for the selected operating means in said grant state corresponding to said selected operating means.
Claim 4
Dependent Claim
42 words
A system as claimed in claim 2, wherein said plurality of states further comprises a transient state, and further wherein said state machine changes from said grant state corresponding to said selected operating means to said initial state via said transient state.
Claim 5
Dependent Claim
21 words
A system as claimed in claim 2, wherein a single programmable logic array comprises said state machine and said latch means.
Claim 6
Dependent Claim
71 words
A system as claimed in claim 2, wherein said state machine has a state variable comprising a plurality of bits, each bit having one of two values, said state variable having different values in each of said plurality of states, and further wherein said state machine changes the value of only one of said bits when said state machine changes from one of said states to another one of said states.
Claim 7
Dependent Claim
33 words
A system as claimed in claim 5, wherein said state machine provides each one of said grant signals based on the value of a respective one of said bits of said state variable.
Claim 8
Independent Claim
18 words
A system as claimed in any one of claims 1 to 6, wherein said resource is a bus.
Claim 9
Independent Claim
18 words
A system as claimed in any one of claims 1 to 6, wherein said resource is a memory.
Claim 10
Dependent Claim
13 words
A system as claimed in claim 8, wherein said memory is a dRAM.
References Cited (Backward Citations)
US4016539A
Cited
US4270170A
Cited
US4270169A
Cited
US4251861A
Cited
US4491916A
Cited
US4412303A
Cited
US4314349A
Cited
US4467422A
Cited
US4390969A
Cited
US4514807A
Cited
US4344134A
Cited
US4468727A
Cited
US4455602A
Cited
US4445177A
Cited
US4499538A
Cited
US4423384A
Cited
US4480307A
Cited
US4473880A
Cited
US4493048A
Cited
US4562427A
Cited
US4546428A
Cited
US4586128A
Cited
US4589067A
Cited
US4578782A
Cited
US4633434A
Cited
US4964034A
Cited
US4740891A
Cited
US4701756A
Cited
US4779089A
Cited
US4881195A
Cited
US4851996A
Cited
US4841178A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-01-12 | 1996-07-13 | 1997-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-01-12 | 2000-07-13 | 2001-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-01-12 | 2004-07-13 | 2005-01-12 | $7700.00 | Window Closed / Lapsed |