US5166768A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compound semiconductor integrated circuit device with an element isolating region
Assignee: Mitsubishi Electric Corp
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Filing: 1990-12-21
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Granted: 1992-11-24
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Expires: 2010-12-21
Abstract
Abstract A compound semiconductor integrated circuit device has a region implanted with an impurity for forming a carrier capture level in an element isolating region in a semi-insulating compound semiconductor substrate. The region includes at least a first region of relatively low implantation concentration of the impurity and a second region of relatively high implantation concentration of the impurity.
Inventors
- 👤 Kazuhiko Ito
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 12:26
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with hydrogen forming a carrier capture level, said element isolating region comprising a first region having a hydrogen concentration in a range from 1×10 17 to 1×10 19 cm -3 and a second region having a hydrogen concentration in a range from 1×10 19 to 1×10 21 cm -3 and separated from said electronic elements by said first region.
Claim 2
Dependent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with hydrogen forming a carrier capture level, said element isolating region comprising a first region having a hydrogen concentration in a range from 1×10 17 to 1×10 19 cm -3 and a second region having a hydrogen concentration in a range from 1×10 19 to 1×10 21 cm -3 and separated from said electronic elements by said first region.
Claim 3
Dependent Claim
55 words
A compound semiconductor integrated circuit device in accordance with claim 1 wherein said element isolating region includes two of said first regions, one of said first regions being disposed adjacent to each of said electronic elements and wherein said second region is disposed between and separated from said electronic elements by said two first regions.
Claim 4
Dependent Claim
23 words
A compound semiconductor integrated circuit device in accordance with claim 1 wherein said first region and said second region include impurity concentration gradients.
Claim 5
Dependent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with boron forming a carrier capture level, said element isolating region comprising a first region having a boron concentration in a range from 1×10 15 to 1×10 17 cm -3 and a second region having a boron concentration in a range from 1×10 17 to 1×10 19 cm -3 and separated from said electronic elements by said first region.
Claim 6
Dependent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with boron forming a carrier capture level, said element isolating region comprising a first region having a boron concentration in a range from 1×10 15 to 1×10 17 cm -3 and a second region having a boron concentration in a range from 1×10 17 to 1×10 19 cm -3 and separated from said electronic elements by said first region.
Claim 7
Dependent Claim
55 words
A compound semiconductor integrated circuit device in accordance with claim 4 wherein said element isolating region includes two of said first regions, one of said first regions being disposed adjacent to each of said electronic elements and wherein said second region is disposed between and separated from said electronic elements by said two first regions.
Claim 8
Dependent Claim
23 words
A compound semiconductor integrated circuit device in accordance with claim 4 wherein said first region and said second region include impurity concentration gradients.
Claim 9
Dependent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with oxygen forming a carrier capture level, said element isolating region comprising a first region having a oxygen concentration in an range from 1×10 15 to 1×10 17 cm -3 and a second region having an oxygen concentration in a range from 1×10 17 to 1×10 19 cm -3 and separated from said electronic elements by said first region.
Claim 10
Dependent Claim
92 words
A compound semiconductor integrated circuit device comprising: a GaAs semi-insulating substrate; two electronic elements spaced apart in said semi-insulating substrate; and an element isolating region in the substrate between said electronic elements implanted with oxygen forming a carrier capture level, said element isolating region comprising a first region having a oxygen concentration in an range from 1×10 15 to 1×10 17 cm -3 and a second region having an oxygen concentration in a range from 1×10 17 to 1×10 19 cm -3 and separated from said electronic elements by said first region.
Claim 11
Dependent Claim
55 words
A compound semiconductor integrated circuit device in accordance with claim 7 wherein said element isolating region includes two of said first regions, one of said first regions being disposed adjacent to each of said electronic elements and wherein said second region is disposed between and separated from said electronic elements by said two first regions.
Claim 12
Dependent Claim
23 words
A compound semiconductor integrated circuit device in accordance with claim 7 wherein said first region and said second region include impurity concentration gradients.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1995-11-24 | 1996-05-25 | 1996-11-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-24 | 2000-05-25 | 2000-11-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-24 | 2004-05-25 | 2004-11-24 | $7700.00 | Window Closed / Lapsed |