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US5149666A
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Method of manufacturing a semiconductor memory device having a floating gate electrode composed of 2-10 silicon grains
Assignee: Toshiba Corp
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Filing: 1991-04-15
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Granted: 1992-09-22
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Expires: 2011-04-15
Abstract
Abstract In a semiconductor memory device having a floating gate structure, the floating gate electrode is composed of 2 to 10 silicon grains. With the floating gate electrode, the insulation film, formed on the floating gate electrode, can have a high breakdown voltage. In a method of manufacturing a semiconductor memory device having a floating gate structure, an insulation film is formed on the silicon substrate, portions of the insulation film which are on the drain and source forming regions of the silicon substrate are removed, and a silicon layer is formed on the silicon substrate by an epitaxial growth process, constituting a floating gate, composed of 2 to 10 silicon grains. According to the manufacturing method, the insulation film formed on the floating gate electrode can have a high breakdown voltage.
Inventors
- 👤 Yuuichi Mikata
- 👤 Toshiro Usami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 06:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D64/00; H10D64/01; H10D64/031; H10D64/035; Y; Y10; Y10S; Y10S148/00; Y10S148/122
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
126 words
A method of manufacturing a semiconductor memory device comprising the steps of: forming an insulation film on a silicon substrate; removing a predetermined portion of said insulation film, said predetermined portion of said insulation film being on at least one of the drain and source forming regions of a semiconductor memory device having a floating gate structure; forming a silicon layer on said silicon substrate by an epitaxial growth process, said silicon layer having a portion which extends on said insulation film and comprising 2 to 10 silicon grains; and removing a predetermined portion of said silicon layer to form a portion thereof which is separated from said substrate, said separated portion of said silicon layer constituting a floating gate electrode of said semiconductor memory device.
Claim 2
Independent Claim
126 words
A method of manufacturing a semiconductor memory device comprising the steps of: forming an insulation film on a silicon substrate; removing a predetermined portion of said insulation film, said predetermined portion of said insulation film being on at least one of the drain and source forming regions of a semiconductor memory device having a floating gate structure; forming a silicon layer on said silicon substrate by an epitaxial growth process, said silicon layer having a portion which extends on said insulation film and comprising 2 to 10 silicon grains; and removing a predetermined portion of said silicon layer to form a portion thereof which is separated from said substrate, said separated portion of said silicon layer constituting a floating gate electrode of said semiconductor memory device.
Claim 3
Independent Claim
200 words
A method of manufacturing a semiconductor memory device having a floating gate structure, comprising the steps of: forming a first insulation film on a silicon substrate; removing that portion of said insulation film, which is at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film; forming a first polysilicon layer composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film on said first polysilicon layer; forming a second polysilicon layer on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that a portion thereof remains which is on said gate insulation film, and said at least one of drain and source forming regions is exposed; doping impurities into said drain and source forming regions to form a source and drain; forming a third insulation film on the structure, having contact holes formed therein leading to at least one of said drain and source; and forming electrodes extending in said contact holes formed in said third insulation film and contacting said at least one of drain and source.
Claim 4
Independent Claim
200 words
A method of manufacturing a semiconductor memory device having a floating gate structure, comprising the steps of: forming a first insulation film on a silicon substrate; removing that portion of said insulation film, which is at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film; forming a first polysilicon layer composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film on said first polysilicon layer; forming a second polysilicon layer on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that a portion thereof remains which is on said gate insulation film, and said at least one of drain and source forming regions is exposed; doping impurities into said drain and source forming regions to form a source and drain; forming a third insulation film on the structure, having contact holes formed therein leading to at least one of said drain and source; and forming electrodes extending in said contact holes formed in said third insulation film and contacting said at least one of drain and source.
Claim 5
Independent Claim
223 words
A method of manufacturing a semiconductor memory device having a floating gate structure, comprising the steps of: forming a first insulation film on a silicon substrate; removing that portion of said insulation film, which is on at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film; doping impurities into said drain and source forming regions to form a source and drain; forming a first polysilicon layer composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film on said first polysilicon layer; forming a second polysilicon layer on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that those portions thereof remain, which are on said gate insulation film and at least one of said drain and source; forming a third insulation film on the structure; forming contact holes in said third insulation film, second insulation film, and second polysilicon layer, leading to said portions of said second polysilicon layer remaining on said at least one of source and drain; and forming electrodes extending in said contact holes and contacting at least one of said portions of said second semiconductor layer remaining on said at least one of source and drain.
Claim 6
Independent Claim
223 words
A method of manufacturing a semiconductor memory device having a floating gate structure, comprising the steps of: forming a first insulation film on a silicon substrate; removing that portion of said insulation film, which is on at least one of the drain and source forming regions of said silicon substrate to form a gate insulation film; doping impurities into said drain and source forming regions to form a source and drain; forming a first polysilicon layer composed of 2 to 10 silicon grains on said silicon substrate by an epitaxial growth process; forming a second insulation film on said first polysilicon layer; forming a second polysilicon layer on said second insulation film; removing the predetermined portions of said first polysilicon layer, first insulation film, and second polysilicon layer, so that those portions thereof remain, which are on said gate insulation film and at least one of said drain and source; forming a third insulation film on the structure; forming contact holes in said third insulation film, second insulation film, and second polysilicon layer, leading to said portions of said second polysilicon layer remaining on said at least one of source and drain; and forming electrodes extending in said contact holes and contacting at least one of said portions of said second semiconductor layer remaining on said at least one of source and drain.
Claim 7
Dependent Claim
67 words
A method of manufacturing a semiconductor memory device according to claim 3, further comprising a step of, between said step for forming a second insulation film on said first polysilicon layer and said step for forming a second polysilicon layer on said second insulation film, removing a predetermined portion of said second polysilicon layer leaving only said second polysilicon layer to remain, above said gate insulation film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-22 | 1996-03-23 | 1996-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-22 | 2000-03-23 | 2000-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-22 | 2004-03-23 | 2004-09-22 | $7700.00 | Window Closed / Lapsed |