Patent US5125007A successfully refreshed from Google Patents.
US5125007A
Expired / Lapsed
US
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Thin-film soi-mosfet with a body region
Assignee: Mitsubishi Electric Corp
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Filing: 1989-11-22
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Granted: 1992-06-23
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Expires: 2009-11-22
Abstract
Abstract An MOS field effect transistor comprises a channel region (6) of a first conductivity type formed in a semiconductor layer (3) on an insulator substrate (2), a source region (8) and a drain region (9) of a second conductivity type formed in contact with one and the other sides of the channel region (6) in the semiconductor layer (3), respectively, a body region (7) formed in contact with at least a part of the channel region (6) and a part of a periphery of the source region (8) in the semiconductor layer (3) and having a higher impurity concentration than that of the channel region (6), a gate electric thin film (4) and a gate electrode (5) formed on the channel region (6), and a conductor (14a) connected in common to the source region (8) and the body region (7).
Inventors
- 👤 Yasuo Yamaguchi
- 👤 Tadashi Nishimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6708; H10D30/6711
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
209 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed on said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region surrounds said channel region, said source region and said drain region, and further extends along a boundary between said channel region and said source region in a lower partial layer.
Claim 2
Dependent Claim
209 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed on said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region surrounds said channel region, said source region and said drain region, and further extends along a boundary between said channel region and said source region in a lower partial layer.
Claim 3
Dependent Claim
19 words
An MOS field effect transistor according to claim 1, wherein said transistor further comprises a lightly doped drain region.
Claim 4
Dependent Claim
204 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed in said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region surrounds said channel region, said source region and said drain region, and further extends along a boundary between said channel region and said source region.
Claim 5
Dependent Claim
204 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed in said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region surrounds said channel region, said source region and said drain region, and further extends along a boundary between said channel region and said source region.
Claim 6
Dependent Claim
19 words
An MOS field effect transistor according to claim 3, wherein said transistor further comprises a lightly doped drain region.
Claim 7
Dependent Claim
197 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed on said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region further extends along a boundary between said channel region and said source region in a lower partial layer.
Claim 8
Dependent Claim
197 words
An MOS field effect transistor comprising: an insulator substrate, a semiconductor layer formed on said insulator substrate, a channel region of a first conductivity type formed in said semiconductor layer, a source region of a second conductivity type formed in said semiconductor layer being in contact with one side of said channel region, a drain region of the second conductivity type formed in said semiconductor layer being in contact with the other side of said channel region, a body region of the first conductivity type having a higher impurity concentration than that of said channel region and being formed in lateral contact with at least a part of said channel region and at least a part of a periphery of said source region in said semiconductor layer, a gate dielectric thin film formed on said channel region, a gate electrode formed on said dielectric thin film, a first conductor connected to said source region and said body region, a second conductor connected to said gate electrode, and a third conductor connected to said drain region, wherein said body region further extends along a boundary between said channel region and said source region in a lower partial layer.
Claim 9
Dependent Claim
19 words
An MOS field effect transistor according to claim 5, wherein said transistor further comprises a lightly doped drain region.
References Cited (Backward Citations)
US4106045A
Cited
JPS51147186A
Cited
DE2637479A1
Cited
US4053916A
Cited
GB1561903A
Cited
US4053916B1
Cited
US4054895A
Cited
JPS5898968A
Cited
US4999691A
Cited
EP0304811A1
Cited
US4969023A
Cited
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