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US5021356A
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Method of making MOSFET depletion device
Assignee: Delphi Technologies Inc
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Filing: 1989-11-16
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Granted: 1991-06-04
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Expires: 2009-11-16
Abstract
Abstract A p-channel depletion device in a MOSFET is formed and preferably comprises a silicon substrate, an N-well region, P+ source and drain regions, and a polysilicon gate which has been appropriately doped to be of a P- conductivity type. The resulting structure performs analogously to a depletion device formed in accordance with conventional methods wherein a depletion mask and implant are utilized and are characterized by a threshold voltage of approximately +250 millivolts or greater.
Inventors
- 👤 Mark F. Henderson
- 👤 John R. Schlais
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 08:08
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/60; H10D64/66; H10D64/661; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0177; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/83135; H10D84/84; H10D84/85; H10D84/857
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
93 words
A method for forming a p-channel depletion device in an MOSFET comprising the following steps: forming an N-well region of conductivity type within an appropriate substrate; forming a polysilicon gate over said N-well region which is characterized by a N- conductivity type; and implanting boron into said N-well region to form source and drain regions of P+ type conductivity while concurrently counter doping said gate, so that said gate is now characterized by a P- type conductivity; such that the threshold voltage of the p-channel depletion device is approximately +250 millivolts or greater.
Claim 2
Independent Claim
93 words
A method for forming a p-channel depletion device in an MOSFET comprising the following steps: forming an N-well region of conductivity type within an appropriate substrate; forming a polysilicon gate over said N-well region which is characterized by a N- conductivity type; and implanting boron into said N-well region to form source and drain regions of P+ type conductivity while concurrently counter doping said gate, so that said gate is now characterized by a P- type conductivity; such that the threshold voltage of the p-channel depletion device is approximately +250 millivolts or greater.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-06-03 | 1994-12-03 | 1995-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-06-03 | 1998-12-03 | 1999-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-06-03 | 2002-12-03 | 2003-06-04 | $7700.00 | Window Closed / Lapsed |