Patent US4937827A successfully refreshed from Google Patents.
US4937827A
Expired / Lapsed
US
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Circuit verification accessory
Assignee: Mentor Graphics Corp
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Filing: 1989-07-25
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Granted: 1990-06-26
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Expires: 2009-07-25
Abstract
Abstract A hardware modeling system 10 simulates portions of electrical circuits 16, 18 utilizing actual hardware components in the simulation. Access to these hardware modeling elements 16, 18 is provided on a shared basis to plural workstations 14. Simulation vectors for plural users may be stored discontiguously in a first memory 26 and a single user's vectors are transferred to a second memory 28 for streaming to the elements 16, 18. An optional timing analyzer and memory circuit 34 periodically samples outputs from pins of the hardware modeling elements to provide timing information on the response of such elements. High impedance testing and bus contention detection is performed on the pins of the hardware modeling elements. Clocking signals applied to the hardware modeling elements are adjustable and may be set at extremely high frequencies. A special gating circuit 292 accesses each pin of the hardware modeling elements and incorporates one or more of the above features.
Inventors
- 👤 Ronald R. Beck
- 👤 Michael E. Stanbro
- 👤 Eric J. Thomsen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:26
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
162 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: permitting an interval between a stimulation of the actual circuitry by the software model and a sampling of the signal produced by said actual circuitry in response thereto, to be controllably varied.
Claim 2
Dependent Claim
162 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: permitting an interval between a stimulation of the actual circuitry by the software model and a sampling of the signal produced by said actual circuitry in response thereto, to be controllably varied.
Claim 3
Dependent Claim
148 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: permitting a rate at which said actual circuitry is stimulated by the software model to be controllably varied.
Claim 4
Dependent Claim
148 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: permitting a rate at which said actual circuitry is stimulated by the software model to be controllably varied.
Claim 5
Dependent Claim
172 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: presenting a clock signal to said actual circuitry in association with other stimulation signals; and delaying the presentation of said clock signal to said actual circuitry to controllable interval presentation of said other stimulation signals with which said clock signal is associated.
Claim 6
Dependent Claim
172 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: presenting a clock signal to said actual circuitry in association with other stimulation signals; and delaying the presentation of said clock signal to said actual circuitry to controllable interval presentation of said other stimulation signals with which said clock signal is associated.
Claim 7
Dependent Claim
156 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals at a first rate in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: sampling at a second rate the output signal produced by said actual circuitry, said second rate being faster than the first rate.
Claim 8
Dependent Claim
156 words
In a method of testing proposed electronic circuitry to verify its desired operation, the method comprising the steps: implementing said proposed electronic circuitry by a software model that receives input signals and produces output signals corresponding thereto in accordance with the model; exercising said modeled circuitry by operating it in conjunction with second circuitry that is to be associated with the proposed circuitry, said second circuitry being actual electronic circuitry, said exercising including stimulating the actual circuitry with signals at a first rate in accordance with data generated by the software model and sampling an output signal produced by said actual circuitry in response thereto; comparing the results produced by the conjunctive operation of said modeled and actual circuitry with desired results to discover errors in operation of the proposed circuitry; an improvement comprising: sampling at a second rate the output signal produced by said actual circuitry, said second rate being faster than the first rate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-25 | 1993-12-25 | 1994-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-25 | 1997-12-25 | 1998-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-25 | 2001-12-25 | 2002-06-26 | $7700.00 | Window Closed / Lapsed |