US3932843A — Real-time control arrangement for a simulation de…

Claim 1

Independent Claim 337 words

A simulation device designed for the development of a program to be used in a real-time operated system including first and second computers operating on a load-sharing basis, said simulation device comprising: a third computer coupled to said first and second computers to simulate their peripheral equipment in a real system by exchanging with said first and second computers data which would normally be exchanged between said first and second computers and their real system peripheral equipment; and a real-time control arrangement including a real-time counter coupled to said first, second and third computers to count real operation time of a program for said real-time system, to subdivide said real operation time into equal steps and to transmit a predetermined signal at the end of each of said steps, a shift counter coupled to said first, second and third computers to delay the turning on of one of said first and second computers with respect to the turning on of the other of said first and second computers by a time equal to the time elapsed between a stopping of said one of said first and second computers and a stopping of said other of said first and second computers when both stoppings occurred after a simultaneous operating period of said first and second computers, two timing counters, each of said timing counters being coupled to a different one of said first and second computers and said third computer to delay the turning on of an associated one of said first and second computers with respect to the turning on of the other of said first and second computers by a time equal to a simulated selected real system peripheral equipment response time after said associated one of said first and second computers was stopped due to the transmission of a data input-output order to a simulated selected real system peripheral equipment, and a clock to synchronize the operation of said first, second and third computers, said real-time counter, said shift counter and said two timing counters.

Claim 2

Dependent Claim 337 words

A simulation device designed for the development of a program to be used in a real-time operated system including first and second computers operating on a load-sharing basis, said simulation device comprising: a third computer coupled to said first and second computers to simulate their peripheral equipment in a real system by exchanging with said first and second computers data which would normally be exchanged between said first and second computers and their real system peripheral equipment; and a real-time control arrangement including a real-time counter coupled to said first, second and third computers to count real operation time of a program for said real-time system, to subdivide said real operation time into equal steps and to transmit a predetermined signal at the end of each of said steps, a shift counter coupled to said first, second and third computers to delay the turning on of one of said first and second computers with respect to the turning on of the other of said first and second computers by a time equal to the time elapsed between a stopping of said one of said first and second computers and a stopping of said other of said first and second computers when both stoppings occurred after a simultaneous operating period of said first and second computers, two timing counters, each of said timing counters being coupled to a different one of said first and second computers and said third computer to delay the turning on of an associated one of said first and second computers with respect to the turning on of the other of said first and second computers by a time equal to a simulated selected real system peripheral equipment response time after said associated one of said first and second computers was stopped due to the transmission of a data input-output order to a simulated selected real system peripheral equipment, and a clock to synchronize the operation of said first, second and third computers, said real-time counter, said shift counter and said two timing counters.

Claim 3

Dependent Claim 284 words

A device according to claim 1, wherein each of said first and second computers is turned to a hang-up condition when it transmits a data input-output order; said first and second computers and said third computer are alternately operated; and said control arrangement further includes a computer stop logic circuit coupled to said real-time counter and said first and second computers, said computer stop logic circuit being activated by said predetermined signal to transmit a first sequence end stop order to one of said first and second computers and a second sequence end stop order to the other of said first and second computers and being activated by said data input-output order transmitted by one of said first and second computers to transmit one of said first and second sequence end stop orders to said other of said first and second computers, a third computer interrupt means coupled to said first, second and third computers, said interrupt means being activated by stop data from the first of said first and second computers to stop in response to the associated one of said first and second sequence end stop orders to transmit an interrupt order to said third computer which has become operative and being activated by said data input-output order from one of said first and second computers to transmit said interrupt order to said third computer which has become operative, and reactivation means coupled to said shift counter and said first, second and third means for reactivating said first and second computers, said real-time counter and said two timing counters upon receipt of start data from said third computer after said third computer has completed its operation started by receiving said interrupt order.

Claim 4

Dependent Claim 105 words

A device according to claim 2, wherein said control arrangement further includes real-time counter stop means coupled to said real-time counter, said first and second computers, said real-time counter stop means being activated by stop data from the first of said first and second computer stopped by the associated one of said first and second sequence end stop order to hold said real-time counter at the count it had achieved when it is stopped and being activated by a data input-output order from either of said first and second computers to hold said real-time counter at the count it had achieved when it is stopped.

Claim 5

Dependent Claim 167 words

A device according to claim 3, wherein said control arrangement further includes shift counter start means coupled to said shift counter and said first and second computers, said shift counter start means being activated by stop data from the first of said first and second computers stopped by the associated one of said first and second sequence end stop order to start said shift counter and being activated by a data input-output order from either of said first and second computers to start said shift counter, and shift counter stop means coupled to said shift counter and said first and second computers, said shift counter stop means being activated by one of said stop data and said hang-up data transmitted by that one of said first and second computers that is still operative after having started said shift counter to stop said shift counter at a count after a time elapse corresponding to the difference in time between the stopping of both said first and second computers.

Claim 6

Dependent Claim 141 words

A device according to claim 4, wherein said control arrangement further includes first means coupled to said two timing counters and said third computer, said first means being responsive to data from said third computer to select one of said two timing counters, said data from said third computer being produced in response to interrupt data received at said third computer because of a data input-output order being transmitted by one of said first and second computers associated with the selected one of said two timing counters, and second means coupled to said two timing counters and said third computer to set said selected one of said two timing counters at a count corresponding to a simulated selected peripheral equipment response time, said count of said selected one of said two timing counters being set by data from said third computer.

Claim 7

Dependent Claim 91 words

A device according to claim 2, wherein said reactivation means includes a synchronization circuit coupled to said third computer to produce output signals in response to said start data, said output signals being spaced in time to start said first and second computers, said shift counter and said two timing counters in the proper sequence to maintain synchronization thereof, the time spacing of said output signals taking into account the geographic location of said first and second computers, said shift counter and said two timing circuits and the circuits employed therein.

Claim 8

Dependent Claim 220 words

A device according to claim 6, wherein said reactivation means further includes a first reactivation circuit coupled to said first and second computers, said synchronization circuit and said shift counter, said first reactivation circuit storing sequence end stop data transmitted from said first and second computers and to transmit a start order to either of said first and second computers, on one hand, when a count end signal is received from said shift counter and said first and second computers to be started has transmitted the last stored stop data and, on the other hand, when a signal is received from said synchronizing circuit and said first and second computers to be started have transmitted the first of two simultaneously stored stop data, said signal from said synchronizing circuit being earlier than said count end signal, and a second reactivation circuit coupled to said first and second computers and said two timing counters, said second reactivation circuit storing accompanying data indicating that one of said first and second computers is in a hang-up condition and to transmit a reset order to said one of said first and second computers when receiving said count end signal from an associated one of said two timing counters and said one of said first and second computers has transmitted said still stored accompanying data.

Claim 9

Dependent Claim 131 words

A device according to claim 7, wherein said second reactivation circuit further includes first and second connections each coupled to a different one of two outputs from said synchronization circuit, a third connection to the output of said shift counter, said first and second connections activating one of said two timing counters associated with said first and second computers whose accompanying data is stored, on the one hand, when receiving a signal from said synchronization circuit if the associated one of said first and second computers has transmitted the first stored accompanying data and, on the other hand, when receiving said count end signal from said shift counter if the associated one of said first and second computers has transmitted the last accompanying data out of two simultaneously stored accompanying data.

Claim 10

Dependent Claim 48 words

A device according to claim 2, wherein said control arrangement further includes at least one sequence end stop control counter coupled to said stop and said computer stop logic circuit to produce, at any selected real-time, a sequence end stop order to activate said computer stop logic circuit.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1979-01-12	1979-07-14	1980-01-13	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1983-01-12	1983-07-14	1984-01-13	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1987-01-12	1987-07-14	1988-01-13	$7700.00	Window Closed / Lapsed

Real-time control arrangement for a simulation device

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