Patent US4559445A successfully refreshed from Google Patents.
Patent US4901136A successfully refreshed from Google Patents.
US4901136A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-chip interconnection package
Assignee: Lockheed Martin Corp
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Filing: 1988-12-15
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Granted: 1990-02-13
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Expires: 2008-12-15
Abstract
Abstract A package for interconnecting a plurality of integrated circuit chips into a functional unit comprising a multilayer substrate having ground and power conducting layers and a frame for holding the chips with their terminal pads on the side of the frame opposite the substrate. Power and ground terminal pads on the chips are coupled to the appropriate potentials via registering conductive feedthroughs passing through the frame and into the substrate into contact with appropriate power or conductive layers in the substrate. Signal pads on the chips are interconnected by means of a conductive layer which is located over the chips on the side of the frame opposite the substrate.
Inventors
- 👤 Constantine A. Neugebauer
- 👤 Lionel M. Levinson
- 👤 II Homer H. Glascock
- 👤 Charles W. Eichelberger
- 👤 Robert J. Wojnarowski
- 👤 Richard O. Carlson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 07:15
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/40; H10W70/421; H10W70/614; H10W70/67; H10W70/68; H10W70/685; H10W76/00; H10W76/10; H10W76/12; H10W90/00
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
181 words
A semiconductor interconnection package comprising: a chip-holding frame having opposed, planar major surfaces, a plurality of holes extending through said frame between said major surfaces, said holes housing a power conducting feedthrough and a ground conducting feedthrough, each of said feedthroughs having opposed ends situated substantially flush with said major surfaces; a plurality of integrated circuit chips carried in openings within said frame, said chips having planar opposed major faces, one of said faces including terminal pads including ground and power pads; and a multilayer substrate supporting said chips, said substrate having an exterior flat surface to which said frame is attached and comprising an insulating wafer having a ground conductor layer, a power conductor layer, and an insulator layer deposited thereover and interposed between said frame and said wafer, said power and ground conductor layers separated from each other by said insulator layer, a first set of conductive vias for electrically coupling said ground conductor layer to said ground pads through said ground conducting feedthroughs, and a second set of conductor layer to said power pads through said power feedthroughs.
Claim 2
Dependent Claim
181 words
A semiconductor interconnection package comprising: a chip-holding frame having opposed, planar major surfaces, a plurality of holes extending through said frame between said major surfaces, said holes housing a power conducting feedthrough and a ground conducting feedthrough, each of said feedthroughs having opposed ends situated substantially flush with said major surfaces; a plurality of integrated circuit chips carried in openings within said frame, said chips having planar opposed major faces, one of said faces including terminal pads including ground and power pads; and a multilayer substrate supporting said chips, said substrate having an exterior flat surface to which said frame is attached and comprising an insulating wafer having a ground conductor layer, a power conductor layer, and an insulator layer deposited thereover and interposed between said frame and said wafer, said power and ground conductor layers separated from each other by said insulator layer, a first set of conductive vias for electrically coupling said ground conductor layer to said ground pads through said ground conducting feedthroughs, and a second set of conductor layer to said power pads through said power feedthroughs.
Claim 3
Dependent Claim
56 words
The combination recited in claim 1 wherein one of said major surfaces faces toward said substrate and the other of said major surfaces faces away from said substrate and wherein said chips include signal pads, said signal pads on different chips being interconnected via signal conductor means located on the side of said other major surface.
Claim 4
Dependent Claim
51 words
The combination recited in claim 2 wherein said signal pads are located substantially flush with said other major surface and further including a continuous thin insulating film deposited on said other major surface, and wherein said signal conductor means comprises a patterned conductive thin film layer carried on said insulating film.
Claim 5
Dependent Claim
17 words
The combination recited in claim 3 wherein said frame and said insulating wafer are made of silicon.
Claim 6
Dependent Claim
24 words
The combination recited in claim 4 wherein said insulating layer separating said ground and power conductor layers in said substrate is made of glass.
Claim 7
Dependent Claim
49 words
The combination recited in claim 2 further including a lead frame having ground and power leads, said ground and power leads coupled to said ground and power conductor layers in said substrate by selected ones of said ground and power vias, respectively, located near the periphery of said substrate.
Claim 8
Dependent Claim
35 words
The combination recited in claim 6 further including a cover supported from said substrate and circumscribing said chip-holding frame and passing over said other major surface to form a hermetic enclosure for said chip-holding frame.
Claim 9
Dependent Claim
64 words
The combination recited in claim 7 wherein said chip-holding frame, substrate, lead frame and cover each have a circular outer periphery, the outer diameter of said lead frame being larger than the outer diameter of said substrate, the outer diameter of said substrate being sufficiently larger than that of said chip-holding frame to provide a circular support band over which said cover is supported.
Claim 10
Dependent Claim
21 words
The combination recited in claim 8 wherein said cover comprises a cylindrical ring and a circular lid carried on said ring.
Claim 11
Dependent Claim
135 words
A chip mounting interconnection package comprising: a chip-holding frame adapted for mounting within openings therein a plurality of chips, each chip including power, ground and signal terminal pads; a multilayer substrate including an insulating wafer adapted to support said chips, said frame being attached to one of two major, planar surfaces of said substrate, said substrate including a ground conductive layer and a power conductive layer separated from each other by an insulation layer, said layers disposed intermediate said frame and said wafer; registering power and ground conductive feedthroughs in said frame and said substrate for coupling power and ground potentials from outside said package to said power and ground pads on said chips via said power and ground feedthroughs respectively; and signal interconnection means deposited on the surface of said frame opposite said substrate.
Claim 12
Dependent Claim
135 words
A chip mounting interconnection package comprising: a chip-holding frame adapted for mounting within openings therein a plurality of chips, each chip including power, ground and signal terminal pads; a multilayer substrate including an insulating wafer adapted to support said chips, said frame being attached to one of two major, planar surfaces of said substrate, said substrate including a ground conductive layer and a power conductive layer separated from each other by an insulation layer, said layers disposed intermediate said frame and said wafer; registering power and ground conductive feedthroughs in said frame and said substrate for coupling power and ground potentials from outside said package to said power and ground pads on said chips via said power and ground feedthroughs respectively; and signal interconnection means deposited on the surface of said frame opposite said substrate.
Claim 13
Dependent Claim
16 words
The combination recited in claim 10 wherein said frame and said wafer are made of silicon.
Claim 14
Dependent Claim
14 words
The combination recited in claim 11 wherein said insulation layer is made of glass.
Claim 15
Dependent Claim
32 words
The combination recited in claim 10 further including a lead frame having power and ground leads, said power and ground leads coupled to said power and ground conductor layers in said substrate.
Claim 16
Dependent Claim
38 words
The combination recited in claim 13 further including a cover supported from said substrate and circumscribing said chip-holding frame and passing over the other of said two major surfaces to form a hermetic enclosure for said chip-holding frame.
Claim 17
Dependent Claim
64 words
The combination recited in claim 14 wherein said chip-holding frame, substrate, lead frame and cover each have a circular outer periphery, the outer diameter of said lead frame being larger than the outer diameter of said substrate, the outer diameter of said substrate being sufficiently larger than that of said chip-holding frame to provide a circular support band over which said cover is supported.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-02-12 | 1993-08-14 | 1994-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-02-12 | 1997-08-14 | 1998-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-02-12 | 2001-08-14 | 2002-02-13 | $7700.00 | Window Closed / Lapsed |