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US4021838A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor integrated circuit devices

Assignee: International Business Machines Corp
•
Filing: 1975-10-20
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Granted: 1977-05-03
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Expires: 1995-10-20
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Abstract

Abstract A power bus element for use in large scale integrated circuits is described. Each bus element consists, for example, of a chip of silicon having two levels of metallization thereon, one acting as an earth (or ground) return plane and the other providing power voltages. Dependent contacts on the chip make selective contact with metallization over the surface of the semiconductor wafer on which the chip is mounted. A power distribution line consists of a number of such bus elements linked together.

Inventors

  • 👤 William Arthur Warwick

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 06:02
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/211; H10D99/00; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/67; H10W70/68; H10W70/685

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 139 words
A semiconductor integrated circuit device comprising a semiconductor wafer containing a plurality of integrated circuit islands arranged in rows defining therebetween channels, said channels providing pathways for electrical signal interconnections between circuit islands, each circuit island having associated therewith terminals solely for the supply of electrical power thereto, a plurality of conductive power feeding paths formed on the substrate and each extending from one of said terminals to a contact area in one of said channels, and a power bus passing along the channel over said electrical signal interconnections and consisting of at least one power distribution element mounted on the substrate, each distribution element having contacts bonded to selected ones of said contact areas, and each element comprising an earth return conductor and a voltage supply conductor electrically separated from one another by a layer of dielectric material.
Claim 2
Dependent Claim 139 words
A semiconductor integrated circuit device comprising a semiconductor wafer containing a plurality of integrated circuit islands arranged in rows defining therebetween channels, said channels providing pathways for electrical signal interconnections between circuit islands, each circuit island having associated therewith terminals solely for the supply of electrical power thereto, a plurality of conductive power feeding paths formed on the substrate and each extending from one of said terminals to a contact area in one of said channels, and a power bus passing along the channel over said electrical signal interconnections and consisting of at least one power distribution element mounted on the substrate, each distribution element having contacts bonded to selected ones of said contact areas, and each element comprising an earth return conductor and a voltage supply conductor electrically separated from one another by a layer of dielectric material.
Claim 3
Dependent Claim 58 words
A device as claimed in claim 1, in which the integrated circuits are arranged in more than two rows, in which a power bus extends along each channel between the rows, and in which the terminals of said integrated circuits are connected by said conductive feeding paths to contact areas located within the channel adjacent the respective circuit.
Claim 4
Dependent Claim 51 words
A device as claimed in claim 1, in which each power bus comprises a plurality of power distribution elements mounted end to end, electrical connections between adjacent elements being made by conductive paths formed on the substrate and extending along the channel between contacts located on the ends of the elements.
Claim 5
Dependent Claim 34 words
A device as claimed in claim 3, in which the conductive paths between the elements are shaped to minimize noise effects between them and signal conductors formed in the channel beneath the conductive paths.
Claim 6
Dependent Claim 18 words
A device as claimed in claim 1, in which each distribution element spans at least two integrated circuits.
Claim 7
Dependent Claim 28 words
A device as claimed in claim 1, wherein the contacts of each element are bonded to selected ones of the contact areas by a controlled collapse bonding technique.
Claim 8
Dependent Claim 49 words
A device as claimed in claim 1, in which distribution element comprises a chip of semiconductor material, a first layer of metal formed on the semiconductor chip, a layer of said dielectric material covering the first metal layer, and a second level of metal formed over the dielectric layer.
Claim 9
Dependent Claim 20 words
A device as claimed in claim 7, wherein the semiconductor material is silicon, and the first metal layer is aluminum.
Claim 10
Dependent Claim 23 words
A device as claimed in claim 8, wherein the dielectric is aluminum oxide formed by anodizing the surface of the layer of aluminum.
Claim 11
Dependent Claim 17 words
A device as claimed in claim 7, wherein the dielectric material is silicon oxide or barium titanate.
Claim 12
Dependent Claim 26 words
A device as claimed in claim 7, wherein the second level of metallization comprises a number of distinct paths, each for supplying a different voltage level.
Claim 13
Dependent Claim 21 words
A device as claimed in claim 7, in which a final layer of dielectric material covers the second level of metal.

References Cited (Backward Citations)

US3748548A Cited
US3947840A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-05-02 1980-11-01 1981-05-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-05-02 1984-11-01 1985-05-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-05-02 1988-11-01 1989-05-03 $7700.00 Window Closed / Lapsed

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