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US3748548A Expired / Lapsed US ⏱️ 0.0 years remaining

Three-dimensional integrated circuits and method of making same

Assignee: Texas Instruments Inc
•
Filing: 1971-09-03
•
Granted: 1973-07-24
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Expires: 1991-09-03
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Abstract

Abstract This invention relates to electrical devices, such as semiconductor networks or integrated circuits. More particularly it relates to circuits of the class described in which a plurality of individual circuit component functions are performed by discrete regions and nondiscrete regions of functionperforming material arranged and operatively interconnected three dimensionally within the structure of a single unit, and to methods of making same.

Inventors

  • 👤 E Mehol
  • 👤 R Haisty
  • 👤 R Johnson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 07:25
CPC Classifications
H; H10; H10F; H10F55/00; H10F55/20; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01; H10D99/00; H10P; H10P95/00; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/20; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H10W99/00; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; Y; Y10; Y10S; Y10S148/00; Y10S148/164; Y10S438/00; Y10S438/98

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 205 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystal lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components integrated in a predetermined pattern upon one surface of an electrically insulating substrate and completely contained in a first stratum thereof; b. at least one monocrystalline electrically conductive interconnection post having the same crystal lattice structure as said wafer, one part of said post being connected to selected ones of said first plurality of circuit components and extending transversely to and away from said one surface of said substrate; c. an epitaxial layer of electrically insulating material formed on said one surface of said substrate to encapsulate each of said first plurality of circuit components and said post, part of said post remaining exposed for electrical contact; and d. a second plurality of circuit components adjacent the surface of said epitaxial layer and completely contained in a second stratum and electrically isolated from said first stratum, preselected ones of said second plurality of components being electrically connected to exposed parts of said at least one post to electrically interconnect selected components in said first stratum with selected regions in said second stratum.
Claim 2
Dependent Claim 205 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystal lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components integrated in a predetermined pattern upon one surface of an electrically insulating substrate and completely contained in a first stratum thereof; b. at least one monocrystalline electrically conductive interconnection post having the same crystal lattice structure as said wafer, one part of said post being connected to selected ones of said first plurality of circuit components and extending transversely to and away from said one surface of said substrate; c. an epitaxial layer of electrically insulating material formed on said one surface of said substrate to encapsulate each of said first plurality of circuit components and said post, part of said post remaining exposed for electrical contact; and d. a second plurality of circuit components adjacent the surface of said epitaxial layer and completely contained in a second stratum and electrically isolated from said first stratum, preselected ones of said second plurality of components being electrically connected to exposed parts of said at least one post to electrically interconnect selected components in said first stratum with selected regions in said second stratum.
Claim 3
Dependent Claim 28 words
An integrated circuit as set forth in claim 1 wherein said electrically insulating material is gallium arsenide having a resistivity of at least 104 ohm-centimeters at room temperature.
Claim 4
Dependent Claim 158 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystalline lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components adjacent a first side of an electrically insulating substrate; b. a second plurality of circuit components adjacent a second side of said electrically insulating substrate; c. an epitaxial layer of electrically insulating semiconductor material on said second side and said second plurality of components thereon, said epitaxial layer encapsulating said second componets within the crystalline lattice of said epitaxial layer; d. a third plurality of circuit componets adjacent the surface of said epitaxial layer and completely contained therein; and e. interconnection means for electrically connecting selected ones of said third plurality of components adjacent the surface of said epitaxial layer with said first components adjacent said first side of said substrate and selected ones of said second components adjacent said second side of said substrate.
Claim 5
Dependent Claim 158 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystalline lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components adjacent a first side of an electrically insulating substrate; b. a second plurality of circuit components adjacent a second side of said electrically insulating substrate; c. an epitaxial layer of electrically insulating semiconductor material on said second side and said second plurality of components thereon, said epitaxial layer encapsulating said second componets within the crystalline lattice of said epitaxial layer; d. a third plurality of circuit componets adjacent the surface of said epitaxial layer and completely contained therein; and e. interconnection means for electrically connecting selected ones of said third plurality of components adjacent the surface of said epitaxial layer with said first components adjacent said first side of said substrate and selected ones of said second components adjacent said second side of said substrate.
Claim 6
Dependent Claim 54 words
An integrated circuit as set forth in claim 3 wherein said interconnection means has the same crystal lattice structure as said substrate and comprises low resistance paths extending through said insulating epitaxial layer and substrate, said low resistance paths being formed by the introduction of conductivity affecting impurities into said epitaxial layer and substrate.
Claim 7
Dependent Claim 40 words
An integrated circuit as set forth in claim 3 wherein said interconnection means comprises a monocrystalline electrically conductive interconnection post having the same crystalline lattice structure as said substrate and extending transversely through said epitaxial layer of electrically insulating material.
Claim 8
Dependent Claim 146 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels wIthin the crystalline lattice of a wafer of semiconductor material comprising: a. a first plurality of circuit components adjacent one surface of a wafer of semiconductor material, said components being electrically isolated from each other; b. an epitaxial layer of semiconductor material covering said one surface and first components thereon to inlcude said first components within the crystalline lattice of a single unit of a semiconductor material, a second plurality of circuit components being formed adjacent the surface of said epitaxial layer and completely enclosed therein and electrically isolated from said first plurality of components; and c. interconnection means for connecting selected portions of said second components adjacent the surface of said epitaxial layer with said one surface of said semiconductor material, said interconnection means being electrically isolated from said epitaxial layer.
Claim 9
Dependent Claim 146 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels wIthin the crystalline lattice of a wafer of semiconductor material comprising: a. a first plurality of circuit components adjacent one surface of a wafer of semiconductor material, said components being electrically isolated from each other; b. an epitaxial layer of semiconductor material covering said one surface and first components thereon to inlcude said first components within the crystalline lattice of a single unit of a semiconductor material, a second plurality of circuit components being formed adjacent the surface of said epitaxial layer and completely enclosed therein and electrically isolated from said first plurality of components; and c. interconnection means for connecting selected portions of said second components adjacent the surface of said epitaxial layer with said one surface of said semiconductor material, said interconnection means being electrically isolated from said epitaxial layer.
Claim 10
Dependent Claim 171 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystalline lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components adjacent a first side of an electrically insulating substrate; b. a second plurality of circuit components adjacent a second side of said electrically insulating substrate, said second plurality of components including means responsive to radiation of a predetermined wavelength; c. an epitaxial layer of electrically insulating semiconductor material on said second side and said second plurality of components thereon, said epitaxial layer encapsulating said second components within the crystalline lattice of said epitaxial layer, said epitaxial layer being substantially transparent to radiation of said predetermined wavelength; and d. a third plurality of circuit components adjacent the surface of said epitaxial layer and completely contained therein, said third plurality including means for generating radiation having said predetermined wavelength, whereby selected components of said second plurality are operatively responsive to the radiation emitted by selected components of said third plurality.
Claim 11
Dependent Claim 171 words
An integrated circuit having a plurality of circuit components disposed within spaced separate levels within the crystalline lattice of a wafer of electrically insulating material comprising: a. a first plurality of circuit components adjacent a first side of an electrically insulating substrate; b. a second plurality of circuit components adjacent a second side of said electrically insulating substrate, said second plurality of components including means responsive to radiation of a predetermined wavelength; c. an epitaxial layer of electrically insulating semiconductor material on said second side and said second plurality of components thereon, said epitaxial layer encapsulating said second components within the crystalline lattice of said epitaxial layer, said epitaxial layer being substantially transparent to radiation of said predetermined wavelength; and d. a third plurality of circuit components adjacent the surface of said epitaxial layer and completely contained therein, said third plurality including means for generating radiation having said predetermined wavelength, whereby selected components of said second plurality are operatively responsive to the radiation emitted by selected components of said third plurality.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-23 1977-01-22 1977-07-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-23 1981-01-22 1981-07-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-23 1985-01-22 1985-07-24 $7700.00 Window Closed / Lapsed

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