Process for manufacture of a semiconductor memory device

Claim 1

A method of manufacturing a semiconductor memory device having a capacitor, comprising the steps of: (a) forming a substrate of a first conductive type; (b) forming a capacitor hole in said substrate such that said capacitor hole includes a generally vertical passage extending within the substrate and which passage terminates in a cavity formed with a curved surface portion extending in the substrate; (c) forming a semiconductor region of a second conductive type on said substrate and which semiconductor region extends coextensive with said passage and areas defining said cavity and such that a resulting generally vertical passage defined by the semiconductive region is dimensionally smaller in cross section than a corresponding cross section of the cavity formed within the substrate; whereby a capacitor region is formed within said capacitor hole between said substrate of the first conductive type and said semiconductor region of the second conductive type.

Claim 2

A method of manufacturing a semiconductor memory device having a capacitor, comprising the steps of: (a) forming a substrate of a first conductive type; (b) forming a capacitor hole in said substrate such that said capacitor hole includes a generally vertical passage extending within the substrate and which passage terminates in a cavity formed with a curved surface portion extending in the substrate; (c) forming a semiconductor region of a second conductive type on said substrate and which semiconductor region extends coextensive with said passage and areas defining said cavity and such that a resulting generally vertical passage defined by the semiconductive region is dimensionally smaller in cross section than a corresponding cross section of the cavity formed within the substrate; whereby a capacitor region is formed within said capacitor hole between said substrate of the first conductive type and said semiconductor region of the second conductive type.

Claim 7

A method of manufacturing a semiconductor memory device using a capacitor as a memory device, comprising the steps of: (a) forming a substrate of a first conductive type; (b) forming a generally vertical hole in the substrate extending substantially vertically to an upper surface thereof and forming an enlarged buried well within the substrate at a lower end of the generally vertical hole; (c) forming a semiconductor region of a second conductive type in said substrate of the first conductive type with said semiconductor region extending generally along said generally vertical hole and along said enlarged buried well; (d) said enlarged buried well establishing a capacitor region between said substrate of the first conductive type and said semiconductor region of the second conductive type, said buried well being formed by an isotropic etching process such that said well has a generally flat bottom surface and includes a curved surface region extending continuously between said bottom to the lower end of the generally vertically hole, said well being wider than the generally vertical hole.

Claim 8

A method of manufacturing a semiconductor memory device using a capacitor as a memory device, comprising the steps of: (a) forming a substrate of a first conductive type; (b) forming a generally vertical hole in the substrate extending substantially vertically to an upper surface thereof and forming an enlarged buried well within the substrate at a lower end of the generally vertical hole; (c) forming a semiconductor region of a second conductive type in said substrate of the first conductive type with said semiconductor region extending generally along said generally vertical hole and along said enlarged buried well; (d) said enlarged buried well establishing a capacitor region between said substrate of the first conductive type and said semiconductor region of the second conductive type, said buried well being formed by an isotropic etching process such that said well has a generally flat bottom surface and includes a curved surface region extending continuously between said bottom to the lower end of the generally vertically hole, said well being wider than the generally vertical hole.