EP0108390A1
Expired / Lapsed
EP
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Semiconductor memory
Assignee: Hitachi Ltd
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Filing: 1983-11-02
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Granted: —
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Expires: 2003-11-02
Abstract
Abstract A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor comprises as one main part a plate (8) which consists of the side walls and base of a groove (17) formed in a semiconductor substrate (10), and as another main part a capacitor electrode (19) which is formed on the side walls and the base over an insulation film (18), and is connected electrically to the source or drain (15) of the insulated-gate field-effect transistor.
Inventors
- 👤 Hideo Sunami
- 👤 Tokuo Kure
- 👤 Yoshifumi Kawamoto
- 👤 Masanobu Miyao
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-23 11:40
CPC Classifications
H; H10; H10B; H10B12/00; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; H10B12/30; H10B12/37; H10B12/39; H10B12/395; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/66; H10D1/665
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
99 words
A semiconductor memory which includes a capacitor (1) with a data storage portion formed on a semiconductor substrate (10; 21), and an insulated-gate field-effect transistor (2), wherein said capacitor (1) comprises: a main part of a first plate (8; 10) which consists of the side walls and base of a groove (17) formed in said semiconductor substrate (10; 21); and a main part of a capacitor electrode (19) which is formed on said side walls and said base over an insulation film (18), and which is connected electrically to the source or drain (15) of said field-effect transistor (2).
Claim 2
Dependent Claim
99 words
A semiconductor memory which includes a capacitor (1) with a data storage portion formed on a semiconductor substrate (10; 21), and an insulated-gate field-effect transistor (2), wherein said capacitor (1) comprises: a main part of a first plate (8; 10) which consists of the side walls and base of a groove (17) formed in said semiconductor substrate (10; 21); and a main part of a capacitor electrode (19) which is formed on said side walls and said base over an insulation film (18), and which is connected electrically to the source or drain (15) of said field-effect transistor (2).
Claim 3
Dependent Claim
24 words
A semiconductor memory according to claim 1, wherein a second plate (22) is provided on said capacitor electrode (19) over an insulation film (13).
Claim 4
Dependent Claim
48 words
A semiconductor memory according to claim 1 or 2, wherein said semiconductor substrate consists of a semiconductor layer (10) of a first conductivity type, and a semiconductor layer (21) of a second conductivity type which is grown epitaxially over said semiconductor layer (10) of the first conductivity type.
Claim 5
Dependent Claim
32 words
A semiconductor memory according to claim 3, wherein at least part of the lower portion of said first plate (8) is connected to the semiconductor layer (10) of said first conductivity type.
Claim 6
Dependent Claim
37 words
A semiconductor memory according to any of claims 1 to 4, wherein the source and drain regions (15, 19) of said insulated-gate field-effect transistor (2) are formed on said semiconductor substrate (10) over an insulation film (18).
Claim 7
Dependent Claim
36 words
A semiconductor memory according to any of claims 1 to 4, wherein at least part of the gate (4) of said insulated-gate field-effect transistor (2) is formed over the main part of said capacitor electrode (19).
References Cited (Backward Citations)
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