Patent US4851358A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4851358A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing

Assignee: DNS ELECTRONIC MATERIALS Inc A DE CORP
•
Filing: 1988-02-11
•
Granted: 1989-07-25
•
Expires: 2008-02-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The concentration of internal gettering sites within a semiconductor wafer is controlled by two-step thermal processing. In a concentration reduction phase, the wafer is rapidly heated to an elevated temperature in the range from about 900 DEG to 1350 DEG C., resulting in the partial or total dissolution of precipitable impurities within the wafer. In a concentration enhancement step, the wafers are subjected to a relatively low temperature anneal process where the density of potential internal gettering sites is increased. By properly controlling the processing temperatures and treatment times, the two steps may be performed in either order to obtain wafers having internal gettering site concentrations within a desired range.

Inventors

  • 👤 Walter Huber

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 14:13
CPC Classifications
C; C30; C30B; C30B33/00; C30B33/02; C30B29/00; C30B29/02; C30B29/06; H; H10; H10P; H10P36/00; H10P36/03; H10P36/20; Y; Y10; Y10S; Y10S148/00; Y10S148/004; Y10S148/024; Y10S148/06; Y10S148/071; Y10S257/00; Y10S257/928

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 111 words
A method for imparting a desired concentration of internal gettering sites in a semiconductor substrate, said method comprising performing the following steps in a predetermined order: (a) rapidly heating the substrate to a temperature in the range from about 900° to 1300° to reduce the concentration of gettering sites, said heating being performed at a rate of at least 10° C./sec; (b) rapidly cooling the substrate to a temperature below about 600° C. to fix the reduced concentration of gettering sites; and (c) annealing the substrate at a temperature in the range from about 550° C. to 850° C. for a predetermined time period to increase the concentration of gettering sites.
Claim 2
Independent Claim 111 words
A method for imparting a desired concentration of internal gettering sites in a semiconductor substrate, said method comprising performing the following steps in a predetermined order: (a) rapidly heating the substrate to a temperature in the range from about 900° to 1300° to reduce the concentration of gettering sites, said heating being performed at a rate of at least 10° C./sec; (b) rapidly cooling the substrate to a temperature below about 600° C. to fix the reduced concentration of gettering sites; and (c) annealing the substrate at a temperature in the range from about 550° C. to 850° C. for a predetermined time period to increase the concentration of gettering sites.
Claim 3
Dependent Claim 66 words
A method as in claim 1, wherein step (a) is performed first at a temperature and for a time selected to reduce the concentration of gettering sites below 10 5 sites/cm 2 and step (c) is performed thereafter at a temperature and for a time sufficient to produce a concentration of internal gettering sites in the range from 10 5 to 5×10 6 sites/cm 2 .
Claim 4
Dependent Claim 70 words
A method as in claim 1, wherein step (c) is performed first at a temperature and for a time selected to increase the concentration of internal gettering sites above 5×10 6 sites/cm 2 , and step (a) is performed thereafter at a temperature and for a time selected to reduce the internal gettering sites to a concentration in the range from about 10 5 to 5×10 6 sites/cm 2 .
Claim 5
Dependent Claim 26 words
A method as in claim 1, wherein the semiconductor substrate is composed of a material selected from the group consisting of silicon and III-V compound semiconductors.
Claim 6
Dependent Claim 25 words
A method as in claim 4, wherein the semiconductor substrate is silicon produced by the Czochralski process and the internal gettering sites are oxygen clusters.
Claim 7
Dependent Claim 31 words
A method as in claim 4, wherein the semiconductor substrate is silicon produced by the float zone process and the internal gettering sites are clusters of nitrogen, oxygen, carbon, or silicon.
Claim 8
Dependent Claim 36 words
A method as in claim 1, where in step (a) the substrate is rapidly heated from room temperature to the desired temperature and maintained at the desired temperature for a period of at least one second.
Claim 9
Dependent Claim 26 words
A method as in claim 1, where in step (c) the substrate is held at the desired temperature for a period of at least 15 minutes.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-07-24 1993-01-23 1993-07-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-07-24 1997-01-23 1997-07-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-07-24 2001-01-23 2001-07-25 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag