EP0060676A2
Expired / Lapsed
EP
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A method for the production of a semiconductor device comprising annealing a silicon wafer
Assignee: Fujitsu Ltd
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Filing: 1982-03-10
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Granted: —
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Expires: 2002-03-10
Abstract
Abstract A method for production of a semiconductor device, possessing the intrinsic gettering effect, is provided in which a silicon wafer is annealed, with annealing temperature increasing from a first temperature, in the range 500°C to 900°C, to a second temperature, in the range 950°C to 1300°C, at a rate not exceeding 14°C/min.
Inventors
- 👤 Kazunori Imaoka
- 👤 Hideaki Kozawa
- 👤 Takao Hiraguchi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 07:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D62/834; H10P; H10P36/00; H10P36/20
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
63 words
A method for production of a semiconductor device possessed of the intrinsic gettering effect, the method comprising annealing a silicon wafer, characterised in that at least one annealing process is effected in which annealing temperature is increased from a first temperature in the range 500°C to 900°C to a second temperature in the range 950°C to 1,300°C, at a rate not exceeding 14°C/min.
Claim 2
Independent Claim
63 words
A method for production of a semiconductor device possessed of the intrinsic gettering effect, the method comprising annealing a silicon wafer, characterised in that at least one annealing process is effected in which annealing temperature is increased from a first temperature in the range 500°C to 900°C to a second temperature in the range 950°C to 1,300°C, at a rate not exceeding 14°C/min.
Claim 3
Dependent Claim
42 words
A method as claimed in claim 1, wherein the silicon wafer contains oxygen to a concentration in excess of 1.5x10 18 /cm 3 and a first such annealing process is effected at a temperature increase rate in the range 5 to 14°C/min.
Claim 4
Dependent Claim
41 words
A method as claimed in claim 1, wherein the silicon wafer contains oxygen to a concentration not exceeding 1.5x10 18 /cm 3 and a first such annealing process is effected at a temperature increase rate in the range not exceeding 5°C/min.
Claim 5
Independent Claim
79 words
A method for production of a semiconductor device which is possessed of the intrinsic gettering effect, the method comprising annealing a silicon wafer, characterised by a first step in which the silicon wafer is annealed at a temperature in excess of 950°C for a period in excess of 10 minutes, and a second step in which the silicon wafer is subjected to at least one annealing process in which annealing temperature is increased at a rate not exceeding 14°C/min.
Claim 6
Independent Claim
79 words
A method for production of a semiconductor device which is possessed of the intrinsic gettering effect, the method comprising annealing a silicon wafer, characterised by a first step in which the silicon wafer is annealed at a temperature in excess of 950°C for a period in excess of 10 minutes, and a second step in which the silicon wafer is subjected to at least one annealing process in which annealing temperature is increased at a rate not exceeding 14°C/min.
Claim 7
Dependent Claim
28 words
A method as claimed in claim 4, wherein at least a increase rate first such annealing process is effected at a temperature/ in the range not exceeding 5°C/min.
Claim 8
Independent Claim
109 words
A method for production of a semiconductor device employing a silicon wafer which has a shallow region which is a denuded zone and which has a deep region containing a high concentration of crystalline defects large in size, the method comprising annealing the silicon wafer, characterised in that annealing processes applied to the silicon wafer are effected in which the annealing temperature is increased from a temperature in the.range 500° to 900°C to a temperature in the range 950 0 C to 1,300°C, and thereafter the annealing temperature is decreased from the said temperature in the range 950° to 1,300°C to said temperature in the range 500°C to 900°C.
Claim 9
Independent Claim
109 words
A method for production of a semiconductor device employing a silicon wafer which has a shallow region which is a denuded zone and which has a deep region containing a high concentration of crystalline defects large in size, the method comprising annealing the silicon wafer, characterised in that annealing processes applied to the silicon wafer are effected in which the annealing temperature is increased from a temperature in the.range 500° to 900°C to a temperature in the range 950 0 C to 1,300°C, and thereafter the annealing temperature is decreased from the said temperature in the range 950° to 1,300°C to said temperature in the range 500°C to 900°C.
Claim 10
Dependent Claim
24 words
A method as claimed in Claim 6, wherein the annealing temperature is increased and decreased at a rate or rates not exceeding 14°C min.
Claim 11
Independent Claim
97 words
A method for production of a semiconductor device possessed of the intrinsic gettering effect, comprising annealing a silicon wafer, characterised in that a first step is effected in which the silicon wafer is subjected to at least one annealing process, the said at least one annealing process being effected such that annealing temperature is increased at a rate not exceeding 5°C/min., and a second step is effected in which a silicon epitaxial layer containing at least one impurity, having one conductivity type, and having a thickness in excess of 2 micrometers is grown on the silicon wafer.
Claim 12
Independent Claim
97 words
A method for production of a semiconductor device possessed of the intrinsic gettering effect, comprising annealing a silicon wafer, characterised in that a first step is effected in which the silicon wafer is subjected to at least one annealing process, the said at least one annealing process being effected such that annealing temperature is increased at a rate not exceeding 5°C/min., and a second step is effected in which a silicon epitaxial layer containing at least one impurity, having one conductivity type, and having a thickness in excess of 2 micrometers is grown on the silicon wafer.
Claim 13
Dependent Claim
19 words
A method as claimed in claim 8, wherein annealing temperature in the first step is increased to approximately 1,100°C.
Claim 14
Dependent Claim
40 words
A method as claimed in Claim 8 or 9, wherein the temperature increase rate in a first annealing process in the first step is not larger than the temperature increase rate of any subsequent annealing process in the first step.
Claim 15
Independent Claim
167 words
A method for production of a bipolar transistor which is possessed of the intrinsic gettering effect, comprising annealing a silicon wafer, characterised by:- a first step in which the silicon wafer is subjected to at least one annealing process, the said at least one annealing process being conducted under the condition that annealing temperature is increased at a rate not exceeding 5°C/min., a second step in which a thin silicon epitaxial layer containing at least one impurity, having one conductivity typeis grown on the silicon wafer; a third step in which at least one impurity, having the said one conductivity type, is introduced in a high concentration into a selected region of the top portion of the thin silicon epitaxial layer for the purpose of producing a buried layer, and a fourth step in which a silicon epitaxial layer containing at least one impurity, having the said one conductivity type, and having a thickness in excess of 2 micrometers, is grown on the thin silicon epitaxial layer.
Claim 16
Independent Claim
167 words
A method for production of a bipolar transistor which is possessed of the intrinsic gettering effect, comprising annealing a silicon wafer, characterised by:- a first step in which the silicon wafer is subjected to at least one annealing process, the said at least one annealing process being conducted under the condition that annealing temperature is increased at a rate not exceeding 5°C/min., a second step in which a thin silicon epitaxial layer containing at least one impurity, having one conductivity typeis grown on the silicon wafer; a third step in which at least one impurity, having the said one conductivity type, is introduced in a high concentration into a selected region of the top portion of the thin silicon epitaxial layer for the purpose of producing a buried layer, and a fourth step in which a silicon epitaxial layer containing at least one impurity, having the said one conductivity type, and having a thickness in excess of 2 micrometers, is grown on the thin silicon epitaxial layer.
Claim 17
Dependent Claim
19 words
A method as claimed in claim 11, wherein annealing temperature in the first step is increased to approximately 1,100°C.
Claim 18
Dependent Claim
39 words
A method as claimed in claim 11 or 12, wherein the temperature increase rate in a first annealing process in the-first step is not larger than the temperature increase rate in any subsequent annealing process in the first step.
References Cited (Backward Citations)
No citation records indexed.
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