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US4608095A Expired / Lapsed US ⏱️ 0.0 years remaining

Gettering

Assignee: Monsanto Co
•
Filing: 1985-04-04
•
Granted: 1986-08-26
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Expires: 2005-04-04
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Abstract

Abstract Semiconductor substrate materials, such as silicon, useful in the manufacture of electronic devices, such as integrated circuits, employing low temperature, i.e., below 1025 DEG C. processing cycles are provided with a 0.05 to 2.0 micron thick layer of polysilicon on the backside to improve gettering capabilities of defects, contaminants and impurities away from the active device region of the substrate.

Inventors

  • 👤 Dale E. Hill

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:54
CPC Classifications
H; H10; H10P; H10P36/00; H10P36/20; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/60; H10P36/03; Y; Y10; Y10S; Y10S148/00; Y10S148/06

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 75 words
A semiconductor substrate useful in electronic device manufacturing processes utilizing initial processing temperatures at 1025 C. or below and having capability for gettering defects, contaminants and impurities deleterious to the devices to a region away from the active device region, consisting essentially of a semiconductor material having an oxygen content less than about 34 ppma (ASTM F-121-79) and a 0.05 to 2.0 micron thick layer of polysilicon on the substrate backside from the device region.
Claim 2
Dependent Claim 75 words
A semiconductor substrate useful in electronic device manufacturing processes utilizing initial processing temperatures at 1025 C. or below and having capability for gettering defects, contaminants and impurities deleterious to the devices to a region away from the active device region, consisting essentially of a semiconductor material having an oxygen content less than about 34 ppma (ASTM F-121-79) and a 0.05 to 2.0 micron thick layer of polysilicon on the substrate backside from the device region.
Claim 3
Dependent Claim 18 words
The substrate of claim 1 wherein the thickness of said polysilicon layer is from 0.4 to 1.2 microns.
Claim 4
Dependent Claim 18 words
The substrate of claim 1 wherein the thickness of said polysilicon layer is from 0.6 to 1.0 microns.
Claim 5
Dependent Claim 10 words
The substrate of claim 1 wherein semiconductor material is silicon.
Claim 6
Dependent Claim 24 words
The substrate of claim 1 wherein said polysilicon layer is applied to said semiconductor material by chemical vapor deposition of a silicon containing material.
Claim 7
Dependent Claim 12 words
The substrate of claim 5 wherein said silicon containing material is silane.
Claim 8
Dependent Claim 73 words
A semiconductor substrate, useful in device manufacturing processes utilizing initial processing temperatures at 1025 C. or below and having capability for gettering defects, contaminants and impurities deleterious to the devices to a region away from the active device region, consisting essentially of a silicon wafer having one mirror-like surface, an oxygen content less than about 34 ppma (ASTM F-121-79) and a 0.4 to 1.12 micron thick layer of polysilicon covering the other surface.
Claim 9
Dependent Claim 73 words
A semiconductor substrate, useful in device manufacturing processes utilizing initial processing temperatures at 1025 C. or below and having capability for gettering defects, contaminants and impurities deleterious to the devices to a region away from the active device region, consisting essentially of a silicon wafer having one mirror-like surface, an oxygen content less than about 34 ppma (ASTM F-121-79) and a 0.4 to 1.12 micron thick layer of polysilicon covering the other surface.
Claim 10
Dependent Claim 15 words
The substrate of claim 7 wherein said layer is from 0.6 to 1.0 micron thick.
Claim 11
Dependent Claim 23 words
The substrate of claim 7 wherein said polysilicon layer is applied to said semiconductor material by low pressure chemical vapor deposition of silane.
Claim 12
Dependent Claim 70 words
In a process of manufacturing electronic devices wherein the devices are formed, using initial processing temperatures at 1025 C. or below, on one surface of a substrate consisting essentially of a semiconductor material having a backside layer of polysilicon, the improvement wherein the oxygen content in the semiconductor material is less than about 34 ppma (ASTM F-121-79) and the layer of polysilicon has a thickness from 0.05 to 2.0 microns.
Claim 13
Dependent Claim 70 words
In a process of manufacturing electronic devices wherein the devices are formed, using initial processing temperatures at 1025 C. or below, on one surface of a substrate consisting essentially of a semiconductor material having a backside layer of polysilicon, the improvement wherein the oxygen content in the semiconductor material is less than about 34 ppma (ASTM F-121-79) and the layer of polysilicon has a thickness from 0.05 to 2.0 microns.
Claim 14
Dependent Claim 15 words
In the process of claim 10 wherein said thickness is from 0.4 to 1.2 microns.
Claim 15
Dependent Claim 15 words
In the process of claim 10 wherein said thickness is from 0.6 to 1.0 micron.
Claim 16
Dependent Claim 12 words
In the process of claim 10 wherein said semiconductor material is silicon.
Claim 17
Independent Claim 46 words
The method for controlling the denuded zone depth and the oxygen precipitation in a semiconductor substrate having an oxygen content less than about 34 ppma (ASTM F-121-79) comprising regulating the thickness of a layer consisting essentially of polysilicon applied to the backside of the semiconductor substrate.
Claim 18
Independent Claim 46 words
The method for controlling the denuded zone depth and the oxygen precipitation in a semiconductor substrate having an oxygen content less than about 34 ppma (ASTM F-121-79) comprising regulating the thickness of a layer consisting essentially of polysilicon applied to the backside of the semiconductor substrate.
Claim 19
Dependent Claim 18 words
The method of claim 14 wherein said polysilicon layer thickness is regulated from about 0.05 to 2.0 microns.
Claim 20
Dependent Claim 18 words
The method of claim 14 wherein said polysilicon layer thickness is regulated from about 0.4 to 1.2 microns.
Claim 21
Dependent Claim 18 words
The method of claim 14 wherein said polysilicon layer thickness is regulated from about 0.6 to 1.0 micron.

References Cited (Backward Citations)

US4053335A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-25 1990-02-24 1990-08-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-25 1994-02-24 1994-08-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-25 1998-02-24 1998-08-26 $7700.00 Window Closed / Lapsed

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