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US4053335A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of gettering using backside polycrystalline silicon

Assignee: International Business Machines Corp
•
Filing: 1976-04-02
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Granted: 1977-10-11
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Expires: 1996-04-02
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Abstract

Abstract An integrated circuit structure and method for manufacturing same which provides for gettering with a backside layer of polycrystalline silicon. The gettering of unwanted impurities from the integrated circuits involves the deposition of a polycrystalline silicon film on a semiconductor wafer prior to any or some high temperature processing steps. The semiconductor body is then subjected to the normal semiconductor processing steps to form semiconductor devices on the surface opposite to the surface having the polycrystalline silicon layer. During these high temperature processing steps, unwanted impurities such as copper, iron, nickel, sodium and potassium ions move toward and into the polycrystalline silicon layer and thereby away from the semiconductor devices. This produces improved yield in the integrated circuit process.

Inventors

  • 👤 Shih-Ming Hu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 21:59
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P14/6309; H10P14/40; H10P14/416; H10P14/6322; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/66; H10P14/668; H10P14/6681; H10P14/6682; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10P14/694; H10P14/6943; H10P14/69433; H10P36/00; H10P36/03; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/06; Y10S148/085; Y10S148/122; Y10S257/00; Y10S257/928

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 114 words
The method for gettering impurities and for removal of point defects from silicon semiconductor material comprising: providing a body of monocrystalline silicon material suitable for forming semiconductor devices therein; depositing a layer of polycrystalline silicon on one major surface of said body by hydrogen reduction of a silicon-containing gas which is passed over said body along with a inert carrier gas while said body is maintained at a temperature between about 600° C. to 800° C.; said layer being predominently oriented to one crystallographic orientation; and forming semiconductor devices on the major surface opposite to the said one major surface of said body which involve processing temperatures between about 800° C. to 1100° C.
Claim 2
Independent Claim 114 words
The method for gettering impurities and for removal of point defects from silicon semiconductor material comprising: providing a body of monocrystalline silicon material suitable for forming semiconductor devices therein; depositing a layer of polycrystalline silicon on one major surface of said body by hydrogen reduction of a silicon-containing gas which is passed over said body along with a inert carrier gas while said body is maintained at a temperature between about 600° C. to 800° C.; said layer being predominently oriented to one crystallographic orientation; and forming semiconductor devices on the major surface opposite to the said one major surface of said body which involve processing temperatures between about 800° C. to 1100° C.
Claim 3
Dependent Claim 34 words
The method of claim 1 wherein the temperature for depositing said layer is between about 680° C. and 800° C. and the thickness of said layer being between about 5000 A and 50000 A.
Claim 4
Dependent Claim 19 words
The method of claim 1 wherein a substantially contaminant impervious film is deposited over said layer of polycrystalline silicon.
Claim 5
Dependent Claim 12 words
The method of claim 3 wherein said film is amorphous silicon nitride.
Claim 6
Dependent Claim 24 words
The method of claim 3 wherein a silicon dioxide layer is formed on said layer of polycrystalline silicon before depositing said silicon nitride film.
Claim 7
Dependent Claim 13 words
The method of claim 3 wherein the said impervious film is aluminum trioxide.
Claim 8
Dependent Claim 14 words
The method of claim 3 wherein the said impervious film is amorphous silicon oxynitride.
Claim 9
Dependent Claim 20 words
The method of claim 3 wherein the thickness of said impervious film is between about 300 Angstroms and 2000 Angstroms.
Claim 10
Dependent Claim 16 words
The method of claim 1 wherein said semiconductor devices are metal oxide silicon field effect transistors.
Claim 11
Dependent Claim 28 words
The method of claim 3 wherein said body is silicon and one of the steps in forming said semiconductor devices includes the formation of an epitaxial silicon layer.
Claim 12
Dependent Claim 32 words
The method of claim 1 wherein the orientation of said body is (011) and the orientation of said layer is predominently [110] and average grain size of less than about 1 micrometer.

References Cited (Backward Citations)

US2841510A Cited
US3370980A Cited
US3494809A Cited
US3632438A Cited
US3694276A Cited
US3871007A Cited
US3745423A Cited
US3723201A Cited
US3862852A Cited
US3900597A Cited
US3929529A Cited
US3997368A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-10-10 1981-04-11 1981-10-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-10-10 1985-04-11 1985-10-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-10-10 1989-04-11 1989-10-11 $7700.00 Window Closed / Lapsed

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