Semiconductor device that minimizes the leakage current associated with the parasitic edge transistors and a method of making the same

Claim 1

A semiconductor device, comprising an island of semiconductor material disposed on an insulating substrate, said island having a top surface and at least one sidewall; a gate insulating layer disposed over said island; a gate electrode disposed over said gate insulating layer such that it overlies said top surface and said at least one sidewall; a channel region of a first conductivity type disposed in said island under said gate electrode and along said at least one sidewall, said channel region having a substantially uniform first conductivity type concentration along said top surface and along the upper portions of said at least one sidewall; source and drain regions of a second conductivity type disposed in said island; first regions of a first conductivity type disposed in the portions of said island not subtended by said gate electrode and contacting said source and drain regions to form diodes with said source and drain regions for electrically isolating said drain region from the portion of the channel region along said at least one sidewall; and second regions of a first conductivity type disposed in the portions of the island not subtended by said gate electrode to separate said first regions forming diodes with said drain region from the portion of the channel region along said at least one sidewall, said second regions having a higher first conductivity type concentration than said first regions forming diodes with said drain region.