Edgeless transistor

Claim 2

A metal-oxide-semiconductor transistor comprising a semiconductor island, a layer of an insulator adjacent the island, a gate electrode adjacent the insulator, the island comprising heavily doped T-shaped source and drain regions of a first conductivity type, a lesser doped I-shaped channel region between said source and drain regions the channel region having a central portion comprising a channel controllable by the gate, the gate overlying the channel, a pair of end portions of the second conductivity type doped to a carrier concentration of about 10 15 atoms/cm 3 or less connected to each end of the channel, the channel being located only underneath the gate, the end portions each extending away from the gate and the channel and terminating away from the gate and the channel adjacent the source or the drain region, each end portion being separate and disjoined from the others.

Claim 3

The transistor of claim 1, wherein the channel region has a conductivity type opposite from that of the source and drain regions.

Claim 4

The transistor of claim 2, wherein two pairs of the end portions, each pair being located at an edge of the island, are connected bilaterally and symmetrically to the channel, each pair having an end portion bounded by surfaces coplanar with a surface of the channel, said end portion being further bounded by surfaces of the source and an island edge, each pair having another end portion bounded by the surfaces coplanar with a surface of the channel the last said end portion being further bounded by surfaces of the drain and the island edge, whereby a substantially I-shaped channel region is formed.

Claim 5

The transistor of claim 3, wherein each end portion is adjacent the insulator, each end portion having only an insulator above.

Claim 6

The transistor of claim 4, wherein two end portions are adjacent the source region and two end portions are adjacent the drain region, and wherein each end portion is adjacent a portion of a top periphery of the island.

Claim 7

The transistor of claim 5 further comprising an insulating substrate adjacent the semiconductor island.

Claim 8

The transistor of claim 6, wherin the island is comprised of silicon, the insulator is comprised of an oxide of silicon, and the gate is comprised of a metal.

Claim 9

The transistor of claim 6, wherein the substrate is comprised of sapphire.

Claim 10

The transistor of claim 8, wherein the gate is comprised of either aluminum or polycrystalline silicon.

Claim 11

A metal-oxide-semiconductor transistor comprising a cruciform shaped semiconductor island, a layer of an insulator adjacent the island, a gate adjacent the insulator, the island comprising heavily doped rectangular source and drain regions of the first conductivity type, a lesser doped I-shaped channel region between said source and drain regions, the channel region having a central portion comprising a channel controllable by the gate, the gate overlying the channel, a pair of end portions of the second conductivity type doped to a carrier concentration of about 10 15 atoms/cm 3 or less connected to each end of the channel, the channel being located only underneath the gate, the end portions each extending away from the gate and the channel and terminating away from the gate and the channel adjacent the source region or the drain region, each end portion being separate and disjoined from the other, the cruciform semiconductor island having four orthogonal, co-planar members, the two end portions comprising two diametrical members.

Claim 12

A metal-oxide-semiconductor transistor comprising a cruciform shaped semiconductor island, a layer of an insulator adjacent the island, a gate adjacent the insulator, the island comprising heavily doped rectangular source and drain regions of the first conductivity type, a lesser doped I-shaped channel region between said source and drain regions, the channel region having a central portion comprising a channel controllable by the gate, the gate overlying the channel, a pair of end portions of the second conductivity type doped to a carrier concentration of about 10 15 atoms/cm 3 or less connected to each end of the channel, the channel being located only underneath the gate, the end portions each extending away from the gate and the channel and terminating away from the gate and the channel adjacent the source region or the drain region, each end portion being separate and disjoined from the other, the cruciform semiconductor island having four orthogonal, co-planar members, the two end portions comprising two diametrical members.