Method for making a thin film transistor

Claim 1

A method for making a thin film transistor comprising the steps of: forming a thin film semiconductor layer entirely on a substrate, etching said semiconductor layer into a predetermined semiconductor pattern, so as to form an etched semiconductor layer depositing, in succession, a gate insulation film and a gate electrode film entirely over said etched semiconductor layer, applying an alignment mask over said gate electrode film corresponding to said predetermined semiconductor pattern, said alignment mask forming a gate pattern for both said gate electrode film and said gate insulation film, etching said gate electrode and gate insulation films to form gate insulation and gate electrode films having self-aligned structures in said gate pattern over said semiconductor layer in said semiconductor pattern, and to form exposed portions of said semiconductor layer, removing said alignment mask, depositing a metal layer over said substrate, said semiconductor layer, said gate electrode film, and said gate insulation film, diffusing metal atoms from said metal layer into said exposed portions of said semiconductor layer, thereby forming a first and a second low resistance area, forming a source electrode by etching and deposition on said substrate, said source electrode contacting said first low resistance portion, and forming a drain electrode by etching and deposition on said substrate, said drain electrode contacting said second low resistance portion.

Claim 2

A method for making a thin film transistor comprising the steps of: forming a thin film semiconductor layer entirely on a substrate, etching said semiconductor layer into a predetermined semiconductor pattern, so as to form an etched semiconductor layer depositing, in succession, a gate insulation film and a gate electrode film entirely over said etched semiconductor layer, applying an alignment mask over said gate electrode film corresponding to said predetermined semiconductor pattern, said alignment mask forming a gate pattern for both said gate electrode film and said gate insulation film, etching said gate electrode and gate insulation films to form gate insulation and gate electrode films having self-aligned structures in said gate pattern over said semiconductor layer in said semiconductor pattern, and to form exposed portions of said semiconductor layer, removing said alignment mask, depositing a metal layer over said substrate, said semiconductor layer, said gate electrode film, and said gate insulation film, diffusing metal atoms from said metal layer into said exposed portions of said semiconductor layer, thereby forming a first and a second low resistance area, forming a source electrode by etching and deposition on said substrate, said source electrode contacting said first low resistance portion, and forming a drain electrode by etching and deposition on said substrate, said drain electrode contacting said second low resistance portion.