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US4667393A
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Method for the manufacture of semiconductor devices with planar junctions having a variable charge concentration and a very high breakdown voltage
Assignee: STMicroelectronics SRL
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Filing: 1985-08-21
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Granted: 1987-05-26
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Expires: 2005-08-21
Abstract
Abstract The invention relates to a method for the manufacture of high voltage semiconductor devices with at least one planar junction with a variable charge concentration. The method consists in doping with impurities of a same type, in a region of monocrystalline semiconductor material, a first zone, and then a second zone which comprises the first, and so on, and in carrying out a subsequent heat treatment so as to provide a planar junction with a stepped profile and a concentration of impurities which decreases from the center to the periphery in a predetemined range. In this way the intensity of the surface electric field, when the junction is reverse biased, is reduced as a result of which it is possible to provide planar junctions having very high breakdown voltages of some thousands of volts.
Inventors
- 👤 Giuseppe Ferla
- 👤 Salvatore Musumeci
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:21
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/105; H10D62/17; H10D62/177; H10D62/60; Y; Y10; Y10S; Y10S148/00; Y10S148/01; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
192 words
A method for the fabrication of a high-voltage semiconductor device comprising the steps of: providing a high resistivity semiconductor substrate of a first conductivity type and having a first major surface; forming a masking layer over said first major surface; forming a first aperture in said masking layer by removing a first portion of said masking layer from said first major surface; introducing a first concentration of doping impurities of a second conductivity type opposite said first conductivity type into said substrate through said first aperture to form a first doped region of said second conductivity type in said substrate; forming a second aperture in said masking layer by removing a second portion of said masking layer in a region surrounding said first aperture; and introducing a second concentration of doping impurities of said second conductivity type into said second aperture and into said substrate including all of said first doped region at said major surface to form a second doped region of said second conductivity type; said second concentration of doping impurities of said second conductivity type being less than said first concentration of doping impurities of said second conductivity type.
Claim 2
Independent Claim
192 words
A method for the fabrication of a high-voltage semiconductor device comprising the steps of: providing a high resistivity semiconductor substrate of a first conductivity type and having a first major surface; forming a masking layer over said first major surface; forming a first aperture in said masking layer by removing a first portion of said masking layer from said first major surface; introducing a first concentration of doping impurities of a second conductivity type opposite said first conductivity type into said substrate through said first aperture to form a first doped region of said second conductivity type in said substrate; forming a second aperture in said masking layer by removing a second portion of said masking layer in a region surrounding said first aperture; and introducing a second concentration of doping impurities of said second conductivity type into said second aperture and into said substrate including all of said first doped region at said major surface to form a second doped region of said second conductivity type; said second concentration of doping impurities of said second conductivity type being less than said first concentration of doping impurities of said second conductivity type.
Claim 3
Dependent Claim
49 words
The method according to claim 1 further including the step of providing a first doped region of said first conductivity type in said first major surface, said first doped region of said first conductivity type surrounding but spaced apart from said first doped region of said second conductivity type.
Claim 4
Dependent Claim
31 words
The method according to claim 2 wherein said first doped region of said first conductivity type and said second region of said second conductivity type intersect at said first major surface.
Claim 5
Independent Claim
53 words
The method according to any one of claims 1, 2 or 3, wherein the doping concentration in said first doped region of said second conductivity type is substantially equal to said first concentration of doping impurities of said second conductivity type plus said second concentration of doping impurities of said second conductivity type.
Claim 6
Independent Claim
40 words
The method according to any one of claims 1, 2 or 3, wherein said first doped region of said second conductivity type has a greater depth in said substrate than does said second doped region of said second conductivity type.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-05-25 | 1990-11-24 | 1991-05-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-05-25 | 1994-11-24 | 1995-05-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-05-25 | 1998-11-24 | 1999-05-26 | $7700.00 | Window Closed / Lapsed |