Abstract A method of fabricating a static induction transistor device comprising providing a semiconductor substrate having a high impurity concentration, and forming a low impurity concentration semiconductor layer of the same conductivity type as the substrate on a surface of the substrate. Next, a high impurity concentration semiconductor region of the same conductivity type as the substrate is formed in a surface of the semiconductor layer formed on the substrate to define a drain region of the device. An ion implanted semiconductor region having a high impurity concentration and a conductivity type opposite the substrate is formed in the semiconductor layer and concentric with the drain region, beneath the surface of the semiconductor layer, and the ion implanted region is diffused within the semiconductor region to form a semiconductor region having a high impurity concentration in the semiconductor layer and of a conductivity type opposite the semiconductor layer and surrounding the drain region at the surface of the semiconductor layer and having a tubelike shape extending downward into the semiconductor region toward the source region of the device.
A method of fabricating a static induction transistor logic device, comprising: providing a semiconductor substrate having a high impurity concentration of a first conductivity type; forming a semiconductor layer on a surface of said substrate having a low impurity concentration on the order of an intrinsic semiconductor and of the first conductivity type; forming a semiconductor region having a high impurity concentration of the first conductivity type in a surface of said semiconductor layer formed on said substrate, wherein the semiconductor region having a high impurity concentration of the first conductivity type constitutes a drain region of the device; forming by ion implantation a semiconductor region having a high impurity concentration of a second conductivity type opposite said substrate in the semiconductor layer and concentric with the drain region beneath the surface of the semiconductor layer; and diffusing the ion implanted region within the semiconductor layer to form a semiconductor region having a high impurity concentration of the second conductivity type in the semiconductor layer and surrounding the drain region at the surface of the semiconductor layer and having a tubelike shape extending downward into the semiconductor layer toward the source region.
Claim 2
Independent Claim
192 words
A method of fabricating a static induction transistor logic device, comprising: providing a semiconductor substrate having a high impurity concentration of a first conductivity type; forming a semiconductor layer on a surface of said substrate having a low impurity concentration on the order of an intrinsic semiconductor and of the first conductivity type; forming a semiconductor region having a high impurity concentration of the first conductivity type in a surface of said semiconductor layer formed on said substrate, wherein the semiconductor region having a high impurity concentration of the first conductivity type constitutes a drain region of the device; forming by ion implantation a semiconductor region having a high impurity concentration of a second conductivity type opposite said substrate in the semiconductor layer and concentric with the drain region beneath the surface of the semiconductor layer; and diffusing the ion implanted region within the semiconductor layer to form a semiconductor region having a high impurity concentration of the second conductivity type in the semiconductor layer and surrounding the drain region at the surface of the semiconductor layer and having a tubelike shape extending downward into the semiconductor layer toward the source region.
Claim 3
Dependent Claim
52 words
A method of fabricating a static induction transistor logic device according to claim 1, wherein the step of forming by ion implantation further comprises forming by ion implantation a sequence of high impurity concentration semiconductor regions within the semiconductor layer at different depths with the deepest region having the highest impurity concentration.
Claim 4
Dependent Claim
14 words
A static induction transistor logic device made according to the method of claim 1.
Claim 5
Dependent Claim
99 words
A method of fabricating a static induction transistor logic device according to claim 2, wherein forming by ion implantation the sequence of high impurity concentration semiconductor regions within the semiconductor layer at different depths is comprised of: ion implanting impurity atoms in the semiconductor layer at a depth of about 2 μm and a concentration on the order of 10 19 /cm 3 ; and then ion implanting impurity atoms in the semiconductor layer at depths of 1.2 μm, 0.6 μm and 0.2 μm, successively, and a concentration on the order of 10 17 /cm 3 at each depth.