Method of fabricating a semiconductor device with a base region having a deep portion

Claim 1

A process of fabricating a semiconductor device with a base region having a deep portion, comprising the steps of: (a) forming an insulating layer on the upper surface of a wafer of semiconductor material comprised of a substrate with a layer of one dopant type thereon; (b) forming a refractory electrode layer on the upper surface of the insulating layer; (c) opening a first window through the refractory electrode layer; (d) forming a first mask layer at least in the first window and opening a second window in the first mask layer, the second window being located within the first window; (e) introducing into the wafer through the second window a first region of the opposite dopant type and of predetermined depth; (f) forming a second mask layer selectively located within the second window; (g) selectively removing the first mask layer, thereby opening a third window defined by the first window and the second mask layer located within the first window; (h) introducing into the wafer through the third window a second region of the same dopant type as the first region but of lesser depth; (i) introducing into the wafer through the third window a third region of the one dopant type and of lesser depth than the second region, the P-N junction thus-formed between the first and third regions terminating at the upper surface of the wafer beneath the second mask layer; (j) removing the second mask layer; and (k) metallizing the semiconductor material exposed as a result of removing the second mask layer, the metallization thereby implementing an electrical short across the P-N junction.