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US4649291A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage reference circuit for providing a predetermined voltage to an active element circuit

Assignee: Toshiba Corp
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Filing: 1984-05-23
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Granted: 1987-03-10
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Expires: 2004-05-23
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Abstract

Abstract A semiconductor integrated circuit includes a function circuit which has a plurality of active elements and performs a predetermined circuit function and which is coupled between a node and a reference terminal; a potential setting circuit, coupled between a power supply terminal and the above-mentioned node, for setting a potential at this node; and a capacitor, coupled between this node and the reference terminal, for smoothing the potential at this node. The function circuit generates a control signal and a conductance between the power supply terminal and the node is varied in response to this control signal, so that the potential setting circuit keeps the potential at this node within a predetermined range, regardless of the current consumed at the function circuit.

Inventors

  • 👤 Satoshi Konishi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 23:13
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/465

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 128 words
A semiconductor integrated circuit comprising: a function circuit having a plurality of active elements for performing a predetermined circuit function and generating at least one control signal, said function circuit being coupled between a node and a reference terminal and having at least two operating modes; potential setting means, coupled between a power supply terminal and said node and controlled by said control signal from said function circuit, for setting the potential at said node to a predetermined value irrespective of said operating mode of said function circuit by varying a conductance between said power supply terminal and said node in response to said control signal from said function circuit; and capacitor means, coupled between said node and said reference terminal, for smoothing the potential at said node.
Claim 2
Dependent Claim 128 words
A semiconductor integrated circuit comprising: a function circuit having a plurality of active elements for performing a predetermined circuit function and generating at least one control signal, said function circuit being coupled between a node and a reference terminal and having at least two operating modes; potential setting means, coupled between a power supply terminal and said node and controlled by said control signal from said function circuit, for setting the potential at said node to a predetermined value irrespective of said operating mode of said function circuit by varying a conductance between said power supply terminal and said node in response to said control signal from said function circuit; and capacitor means, coupled between said node and said reference terminal, for smoothing the potential at said node.
Claim 3
Dependent Claim 49 words
A semiconductor integrated circuit according to claim 1, wherein said function circuit comprises an operation mode setting circuit for generating at least one operation mode setting signal to set said operating mode of said function circuit and to generate said control signal in response to said operation mode signal.
Claim 4
Dependent Claim 81 words
A semiconductor integrated circuit according to claim 2, wherein said potential setting means comprises first circuit means which has a substantially constant conductance irrespective of the control signal from said function circuit; and second circuit means which is coupled in parallel with said first circuit means and whose conductance is varied in response to the control signal from said function circuit, both said first circuit means and said second circuit means being connected between said power supply terminal and said node.
Claim 5
Dependent Claim 25 words
A semiconductor integrated circuit according to claim 3, wherein said first circuit means comprises an MOS transistor which receives at its gate a reference voltage.
Claim 6
Dependent Claim 31 words
A semiconductor integrated circuit according to claim 3, wherein said second circuit means comprises a depletion type MOS transistor which receives at its gate said control signal from said function circuit.
Claim 7
Dependent Claim 54 words
A semiconductor integrated circuit according to claim 3, wherein said function circuit generates a plurality of mutually different control signals and said second circuit means comprises a plurality of depletion type MOS transistors which are coupled in parallel and which receive at their respective gates said plurality of control signals from said function circuit.
Claim 8
Dependent Claim 45 words
A semiconductor integrated circuit according to claim 3, wherein said second circuit means comprises a voltage generating circuit and an enhancement type MOS transistor whose gate receives a gate voltage from said voltage generating circuit in response to said control signal from said function circuit.
Claim 9
Dependent Claim 32 words
A semiconductor integrated circuit according to claim 7, wherein said voltage generating circuit has a bootstrap circuit for generating a gate voltage in response to said control signal from said function circuit.
Claim 10
Dependent Claim 42 words
A semiconductor integrated circuit according to claim 3, wherein said second circuit means comprises a bipolar transistor; and a base potential setting circuit for setting a base potential of said bipolar transistor in response to said control signal from said function circuit.
Claim 11
Dependent Claim 70 words
A semiconductor integrated circuit according to claim 3, wherein said function circuit generates mutually different control signals and said second circuit means includes a plurality of voltage generating circuits and a plurality of enhancement type MOS transistors which are connected in parallel and which receive at their respective gates gate voltages from said plurality of voltage generating circuits in response to said mutually different control signals from said function circuit.
Claim 12
Dependent Claim 38 words
A semiconductor integrated circuit according to claim 10, wherein each of said plurality of voltage generating circuits includes a bootstrap circuit for generating a gate voltage in response to said mutually different control signals from said function circuit.
Claim 13
Dependent Claim 49 words
A semiconductor integrated circuit according to claim 2, wherein said potential setting means comprises a gate voltage generating circuit controlled by said control signal from said function circuit and at least one MOS transistor whose gate is connected to receive a gate voltage from said gate voltage generating circuit.
Claim 14
Dependent Claim 83 words
A semiconductor integrated circuit according to claim 12, wherein said gate voltage generating circuit comprises first resistor means coupled between said power supply terminal and the gate of said at least one MOS transistor; and a series circuit of second resistor means and a further MOS transistor coupled between the gate of said at least one MOS transistor and said reference terminal and the conduction state of said further MOS transistor being controlled in response to said control signal from said function circuit.
Claim 15
Dependent Claim 63 words
A semiconductor integrated circuit according to claim 12, wherein said gate voltage generating circuit includes resistor means coupled between said power supply terminal and the gate of said at least one MOS transistor; and a further MOS transistor which is coupled between said resistor means and said reference terminal and whose conduction state is controlled by said control signal from said function circuit.
Claim 16
Dependent Claim 35 words
A semiconductor integrated circuit according to claim 1, wherein said function circuit comprises detecting means for detecting that a consumption current flowing through said function circuit exceeds a predetermined value and generating said control signal.
Claim 17
Dependent Claim 80 words
A semiconductor integrated circuit according to claim 15, wherein said potential setting means comprises first circuit means which has a constant conductance with respect to said control signal from said function circuit; and second circuit means which is coupled in parallel with said first circuit means and whose conductance is varied in response to said control signal from said function circuit, both said first circuit means and second circuit means being connected between said power supply terminal and said node.
Claim 18
Dependent Claim 37 words
A semiconductor integrated circuit according to claim 16, wherein said first circuit means includes a reference voltage generating circuit and an MOS transistor which receives at its gate a reference voltage from said reference voltatge generating circuit.
Claim 19
Dependent Claim 31 words
A semiconductor integrated circuit according to claim 16, wherein said second circuit means comprises a depletion type MOS transistor which receives at its gate said control signal from said function circuit.
Claim 20
Dependent Claim 48 words
A semiconductor integrated circuit according to claim 16, wherein said second circuit means comprises a voltage generating circuit and an enhancement type MOS transistor whose gate is connected to receive a gate voltage from said voltage generating circuit in response to said control signal from said function circuit.
Claim 21
Dependent Claim 32 words
A semiconductor integrated circuit according to claim 19, wherein said voltage generating circuit has a bootstrap circuit for generating a gate voltage in response to said control signal from said function circuit.
Claim 22
Dependent Claim 42 words
A semiconductor integrated circuit according to claim 16, wherein said second circuit means comprises a bipolar transistor; and a base potential setting circuit for setting a base potential of said bipolar transistor in response to said control signal from said function circuit.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-03-09 1990-09-08 1991-03-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-03-09 1994-09-08 1995-03-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-03-09 1998-09-08 1999-03-10 $7700.00 Window Closed / Lapsed

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