Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
315 words
A voltage translating circuit comprising: a first field effect transistor having a source region of a first conductivity type coupled to a first operating voltage node, a drain region of the first conductivity type coupled to an output node, a current channel region of a second conductivity type between the source and drain regions thereof and coupled to the first operating voltage node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a first input node; a second field effect transistor having a source region of the second conductivity type coupled to a second input node, a drain region of the second conductivity type, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to the first input node; a third field effect transistor having a source region of the second conductivity type coupled to the drain region of the second transistor, a drain region of the second conductivity type coupled to the output node, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a third input node; and a fourth field effect transistor having a source region of the second conductivity type coupled to the second input node, a drain region of the second conductivity type coupled to the output node, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a second operating voltage node.
Claim 2
Dependent Claim
315 words
A voltage translating circuit comprising: a first field effect transistor having a source region of a first conductivity type coupled to a first operating voltage node, a drain region of the first conductivity type coupled to an output node, a current channel region of a second conductivity type between the source and drain regions thereof and coupled to the first operating voltage node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a first input node; a second field effect transistor having a source region of the second conductivity type coupled to a second input node, a drain region of the second conductivity type, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to the first input node; a third field effect transistor having a source region of the second conductivity type coupled to the drain region of the second transistor, a drain region of the second conductivity type coupled to the output node, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a third input node; and a fourth field effect transistor having a source region of the second conductivity type coupled to the second input node, a drain region of the second conductivity type coupled to the output node, a current channel region of the first conductivity type between the source and drain regions thereof and coupled to the second input node, and a gate electrode adjacent to but insulated from the current channel region thereof and coupled to a second operating voltage node.
Claim 3
Dependent Claim
42 words
The circuit of claim 1 wherein the first transistor has a P-type source and drain regions and an N-type current channel region, and wherein the second, third and fourth transistors each have N-type source and drain regions and P-type current channel regions.