Patent US1224262A successfully refreshed from Google Patents.
Patent US4569117A successfully refreshed from Google Patents.
US4569117A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making integrated circuit with reduced narrow-width effect
Assignee: Texas Instruments Inc
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Filing: 1984-05-09
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Granted: 1986-02-11
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Expires: 2004-05-09
Abstract
Abstract A method of making MOS integrated circuits employs high-pressure oxidation of the surface of a silicon slice to create thermal field oxide for device isolation. The implant used prior to this oxidation to provide the channel-stop regions beneath the field oxide may be at a lower dosage, and yet the field-transistor threshold voltage is maintained at a high level. Thus, encroachment of the channel stop impurity into the transistor channel is minimized, and higher density devices are permitted.
Inventors
- 👤 David A. Baglee
- 👤 Michael C. Smayling
- 👤 Michael P. Duane
- 👤 Mamoru Itoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:46
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P14/6309; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10P14/6322; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
139 words
A method of forming a channel stop region in making an MOS transistor at a face of a silicon body, comprising the steps of: applying a layer of oxidation mask to said face, and patterning said layer to define a transistor channel area, subjecting said face to an impurity implant at a dosage not exceeding about 5×10 12 atoms/cm 2 to provide a channel-stop region, and subjecting said face to a high temperature in an oxidizing atmosphere at a pressure at least about five times and not more than about fifteen times atmospheric to oxidize the surface of the face to produce a thermally-grown field oxide layer with a channel-stop region beneath it in the face, in the area of said face not covered by said oxidation mask, resulting in a field threshold voltage at least about +15 v.
Claim 2
Independent Claim
139 words
A method of forming a channel stop region in making an MOS transistor at a face of a silicon body, comprising the steps of: applying a layer of oxidation mask to said face, and patterning said layer to define a transistor channel area, subjecting said face to an impurity implant at a dosage not exceeding about 5×10 12 atoms/cm 2 to provide a channel-stop region, and subjecting said face to a high temperature in an oxidizing atmosphere at a pressure at least about five times and not more than about fifteen times atmospheric to oxidize the surface of the face to produce a thermally-grown field oxide layer with a channel-stop region beneath it in the face, in the area of said face not covered by said oxidation mask, resulting in a field threshold voltage at least about +15 v.
Claim 3
Dependent Claim
29 words
A method according to claim 1 wherein said high temperature is at least about 900° C. and said oxidation is at a pressure of at least about five atmospheres.
Claim 4
Dependent Claim
23 words
A method according to claim 2 wherein said impurity is boron, and said dosage is not over about 2×10 12 atoms/cm 2 .
Claim 5
Dependent Claim
23 words
A method according to claim 3 wherein said oxidation mask is nitride, and said field oxide is many times thicker than said nitride.
Claim 6
Independent Claim
119 words
A method of forming an isolation area at a face of a silicon body, comprising the steps of: subjecting said area of said face to an impurity implant at a dosage not exceeding about 5×10 12 atom/cm 2 to provide a channel-stop region, and subjecting said silicon body to a high temperature of at least about 900 C. in an oxidizing atmosphere at a pressure of at least about 5 and no more than about 15 times atmospheric to oxidize said area of the face to produce a thermally-grown field oxide layer with a channel-stop region beneath it in the face, resulting in a field threshold voltage along said area of the face of at least about +15 v.
Claim 7
Independent Claim
119 words
A method of forming an isolation area at a face of a silicon body, comprising the steps of: subjecting said area of said face to an impurity implant at a dosage not exceeding about 5×10 12 atom/cm 2 to provide a channel-stop region, and subjecting said silicon body to a high temperature of at least about 900 C. in an oxidizing atmosphere at a pressure of at least about 5 and no more than about 15 times atmospheric to oxidize said area of the face to produce a thermally-grown field oxide layer with a channel-stop region beneath it in the face, resulting in a field threshold voltage along said area of the face of at least about +15 v.
Claim 8
Dependent Claim
27 words
A method according to claim 5 wherein silicon body is P-type, said impurity is boron, and said dosage is not over about 2×10 12 atoms/cm 2 .
Claim 9
Dependent Claim
19 words
A method according to claim 6 wherein said oxidation is at a pressure of at least about nine atmospheres.
Claim 10
Dependent Claim
27 words
A method according to claim 7 wherein said silicon body is subjected to said high temperature for a period of time not greater than about one hour.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-02-10 | 1989-08-12 | 1990-02-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-02-10 | 1993-08-12 | 1994-02-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-02-10 | 1997-08-12 | 1998-02-11 | $7700.00 | Window Closed / Lapsed |