US4567499A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory device
Assignee: BP PLC
•
Filing: 1983-05-12
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Granted: 1986-01-28
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Expires: 2003-05-12
Abstract
Abstract Memory device comprises a glass substrate (1), a layer of indium tin oxide (2), a layer of p type semiconductor (3), a layer of i type semiconductor (4), a layer of n type semiconductor (5) and a layer of spots of an electrically conducting material (6). Silicon is the preferred semiconductor. The device is conditioned by the application of a voltage sufficiently large to cause the structure to be permanently modified to reduce the electrical resistance of the layers. It is a feature of the device that no p and n layers are adjacent.
Inventors
- 👤 Peter J. Hockley
- 👤 Michael J. Thwaites
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H10D; H10D48/00; H10D48/30; H10D48/38; H10D48/381
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
61 words
A memory device comprising an electrically conducting substrate and layers of i and p and/or n type amorphous or microcrystalline semiconducting material which have been conditioned by the application of a voltage sufficiently large to cause the structure to be permanently modified to reduce the electrical resistance of the layers wherein no p and n layers are adjacent in the device.
Claim 2
Dependent Claim
61 words
A memory device comprising an electrically conducting substrate and layers of i and p and/or n type amorphous or microcrystalline semiconducting material which have been conditioned by the application of a voltage sufficiently large to cause the structure to be permanently modified to reduce the electrical resistance of the layers wherein no p and n layers are adjacent in the device.
Claim 3
Dependent Claim
30 words
A memory device according to claim 1 wherein layers of p type and i type amorphous or microcrystalline semi-conducting material are deposited on the substrate to form a p-i configuration.
Claim 4
Dependent Claim
26 words
A memory device according to claim 2 wherein an additional layer of n type amorphous or microcrystalline semiconducting material is deposited to form a p-i-n configuration.
Claim 5
Dependent Claim
16 words
A memory device according to claim 1 wherein the amorphous or microcrystalline semi-conducting material is silicon.
Claim 6
Dependent Claim
31 words
A memory device according to claim 1 wherein the substrate is glass, the surface of which has been rendered electrically conducting by a layer of tin oxide or indium tin oxide.
Claim 7
Dependent Claim
29 words
A memory device according to claim 1 wherein the structure includes one or more electrically conducting areas on the outer surface of the semi-conductor layer remote from the substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-27 | 1989-07-29 | 1990-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-27 | 1993-07-29 | 1994-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-27 | 1997-07-29 | 1998-01-28 | $7700.00 | Window Closed / Lapsed |