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US4561906A Expired / Lapsed US ⏱️ 0.0 years remaining

Laser activated polysilicon connections for redundancy

Assignee: Nortel Networks Ltd
•
Filing: 1983-10-24
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Granted: 1985-12-31
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Expires: 2003-10-24
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Abstract

Abstract An integrated circuit is fabricated with some redundant capacity by forming potential electrically conducting links which can subsequently be made electrically when extra circuit capacity is required. Field oxide is grown on a silicon substrate and then a layer of polysilicon deposited over the oxide. At the redundancy sites where electrical connections may subsequently be made, an anti-reflective silicon nitride coating is deposited and photodefined. The areas of this coating are used as masks in order to diffuse dopant into the polysilicon at parts of the polysilicon laterally adjacent the redundancy sites. When later it is necessary to bring spare capacity into the circuit the complete circuit is scanned with a continuous wave laser. The laser melts the polysilicon under the nitride mask permitting the dopant to diffuse from the adjacent parts of the polysilicon and so form a conducting link. However under parts of the polysilicon not covered by an anti-reflective coating the polysilicon is not melted by the laser beam and so its conductivity remains unchanged. The fabrication process is self-aligned since the intrinsic or undoped region of the polysilicon is the same as the region which is melted. The method for making the electrical links does not require precise positioning and focussing of the laser beam as in known methods.

Inventors

  • 👤 Iain D. Calder
  • 👤 Hussein M. Naguib

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 13:51
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/492; Y; Y10; Y10S; Y10S148/00; Y10S148/093

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 132 words
In an integrated circuit fabrication process the method of forming a redundancy link comprising depositing a layer of polysilicon on a substrate, forming an anti-reflective coating of a region of the polysilicon layer at an intended site of the redundancy link and, using the anti-reflective coating as a mask, raising the conductivity of parts of the polysilicon layer adjacent to said region by introducing a dopant, and electrically making said link by scanning the integrated circuit with a laser beam having a wavelength related to the anti-reflective layer such that the polysilicon is melted under the anti-reflective layer to cause diffusion of dopant into said region from the adjacent raised conductivity parts, thereby to make an electrical connection at the link, but is not melted where no anti-reflective layer overlies the polysilicon.
Claim 2
Dependent Claim 132 words
In an integrated circuit fabrication process the method of forming a redundancy link comprising depositing a layer of polysilicon on a substrate, forming an anti-reflective coating of a region of the polysilicon layer at an intended site of the redundancy link and, using the anti-reflective coating as a mask, raising the conductivity of parts of the polysilicon layer adjacent to said region by introducing a dopant, and electrically making said link by scanning the integrated circuit with a laser beam having a wavelength related to the anti-reflective layer such that the polysilicon is melted under the anti-reflective layer to cause diffusion of dopant into said region from the adjacent raised conductivity parts, thereby to make an electrical connection at the link, but is not melted where no anti-reflective layer overlies the polysilicon.
Claim 3
Dependent Claim 21 words
A method as claimed in claim 1 further comprising forming the anti-reflective coating by low pressure chemically vapour depositing silicon nitride.
Claim 4
Dependent Claim 33 words
A method as claimed in claim 1 further comprising forming the higher conductivity parts of the polysilicon layer by diffusing a dopant into the polysilicon layer using the silicon nitride as a mask.
Claim 5
Dependent Claim 34 words
A method as claimed in claim 1 further comprising forming the higher conductivity parts of the polysilicon layer by ion implantation of impurity species into the polysilicon using the silicon nitride as a mask.
Claim 6
Dependent Claim 39 words
A method as claimed in claim 1 further comprising depositing a dielectric layer, opening contact windows through the dielectric layer to the polysilicon, evaporating metallization through the windows, and depositing a further layer of dielectric over the integrated circuit.
Claim 7
Dependent Claim 46 words
A method as claimed in claim 1 in which the thickness of the anti-reflective coating is an odd multiple of 0.06 microns thereby adapting the integrated circuit for selective activation of the redundancy links using an argon ion laser with an output wavelength of 0.5 microns.

References Cited (Backward Citations)

US4268950A Cited
JPS5548926A Cited
US4351674A Cited
US4409724A Cited
US4468855A Cited
US4387503A Cited
US4462150A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-12-30 1989-07-01 1989-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-12-30 1993-07-01 1993-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-12-30 1997-07-01 1997-12-31 $7700.00 Window Closed / Lapsed

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