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US4415383A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating semiconductor devices using laser annealing

Assignee: Nortel Networks Ltd
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Filing: 1982-05-10
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Granted: 1983-11-15
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Expires: 2002-05-10
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Abstract

Abstract In the manufacture of VLSI (very large scale integrated) MOS (metal-oxide-semiconductor) circuits, a polysilicon gate is deposited on an oxide layer overlaying a silicon substrate. Ideally, the polysilicon gate is made extremely small and with sharply defined vertical boundaries. The invention proposes depositing a polysilicon layer, covering a region of the layer with an antireflective coating, and laser annealing the layer. Laser radiation is absorbed to a higher level by the coated region than elsewhere and consequently the polysilicon layer in this region melts and recrystallizes into large grains. The polysilicon layer is then etched using etch conditions ensuring preferential etching of unrecrystallized polysilicon in comparison with recrystallized polysilicon. Consequently, except at the coated region, the polysilicon is etched quickly and there is very little undercutting of the gate region. Preferential etching methods based on differing dopant levels in polysilicon are known but do not produce the sharp edge definition enabled using the present process.

Inventors

  • 👤 Abdalla A. H. Naem
  • 👤 Iain D. Calder
  • 👤 Hussein M. Naguib

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 08:36
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/60; H10P50/66; H10P50/663; H10P50/667; H10D; H10D64/00; H10D64/01; H10D64/011; H10P34/00; H10P34/40; H10P34/42; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268; Y; Y10; Y10S; Y10S148/00; Y10S148/09; Y10S148/091

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 65 words
In a method of making silicon integrated circuits, the steps of depositing a layer of polysilicon on an insulating layer, covering a region of the polysilicon with an antireflective coating, directing laser radiation at the polysilicon layer to recrystallize only an area under the antireflective coating, and etching the polysilicon layer using etch conditions ensuring preferential etching of unrecrystallized polysilicon in comparison to recrystallized polysilicon.
Claim 2
Dependent Claim 65 words
In a method of making silicon integrated circuits, the steps of depositing a layer of polysilicon on an insulating layer, covering a region of the polysilicon with an antireflective coating, directing laser radiation at the polysilicon layer to recrystallize only an area under the antireflective coating, and etching the polysilicon layer using etch conditions ensuring preferential etching of unrecrystallized polysilicon in comparison to recrystallized polysilicon.
Claim 3
Dependent Claim 20 words
A method as claimed in claim 1, in which the antireflective coating is silicon nitride (Si 3 N 4 ).
Claim 4
Dependent Claim 15 words
A method as claimed in claim 1, in which the insulating layer is silicon dioxide.
Claim 5
Dependent Claim 19 words
A method as claimed in claim 1, in which laser radiation is provided from a continuous wave argon laser.
Claim 6
Dependent Claim 29 words
A method as claimed in claim 1, in which the polysilicon layer is etched using a wet etchant comprising a mixture of hydrofluoric acid, nitric acid and acetic acid.
Claim 7
Dependent Claim 18 words
A method as claimed in claim 1, in which the polysilicon is plasma etched in a fluorine-based plasma.
Claim 8
Dependent Claim 39 words
A method as claimed in claim 1, in which the laser radiation produces in the polysilicon underlying the antireflective coating a change in grain size from approximately 500 A to a crystal size of at least 2 μm×20 μm.
Claim 9
Dependent Claim 33 words
A method as claimed in claim 1, in which the polysilicon under the antireflective coating is laser annealed sufficiently to produce at least a halving of resistivity in comparison with the unannealed polysilicon.
Claim 10
Dependent Claim 25 words
A method as claimed in claim 1, in which the ratio of etch rates of unannealed and laser annealed polysilicon is from 11:1 to 15:1.
Claim 11
Dependent Claim 36 words
A method as claimed in claim 1, comprising the further steps subsequent to the preferential etch step, of removing the antireflective coating and diffusing material into the exposed annealed polysilicon to significantly increase the conductivity thereof.
Claim 12
Dependent Claim 50 words
A method as claimed in claim 10, specifically for fabricating metal-oxide-semiconductor (MOS) transistors, the method further comprising exposing areas of the substrate at spaced locations adjacent respective ends of the laser annealed polysilicon and diffusing material into the substrate to a shallow depth to provide transistor source and drain regions.

References Cited (Backward Citations)

US3943542A Cited
US4059461A Cited
US4219379A Cited
US4377902A Cited
US4377031A Cited
US4319954A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-11-14 1987-05-16 1987-11-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-11-14 1991-05-16 1991-11-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-11-14 1995-05-16 1995-11-15 $7700.00 Window Closed / Lapsed

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