Patent US4486854A successfully refreshed from Google Patents.
US4486854A
Expired / Lapsed
US
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First-in, first-out memory system
Assignee: Motorola Solutions Inc
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Filing: 1981-10-15
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Granted: 1984-12-04
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Expires: 2001-10-15
Abstract
Abstract Independent loading and first-in, first-out reading of a sequence of data words in a data store is controlled by pointers which independently indicate the next-to-be-loaded and next-to-be-read stages in the data store, the pointers being updated after each loading and reading; half-full flag circuitry indicates when at least half of the stages are occupied; and the number of stages available for storing can be selectably changed.
Inventors
- 👤 William Yuni
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:04
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/06; G06F5/10; G06F5/12; G06F2205/00; G06F2205/12; G06F2205/126
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
228 words
Apparatus for controlling the loading into a data store of a sequence of data words and the reading from said data store of said data words in the same said sequence, said data store comprising a plurality of stages, said apparatus being arranged for determining the next-to-be-read and next-to-be-loaded stages of said data store comprising: pointer circuitry connected to specify the next-to-be-loaded one of said stages and to specify independently the next-to-be-read one of said stages, a loader responsive to said pointer circuitry and connected to enable loading said next data word in said sequence to be loaded, a reader responsive to said pointer circuitry and connected to enable reading, independently of said loader, said next data word in said sequence to be read, and pointer update circuitry for updating the status of said pointer circuitry after each said loading and after each said reading, said pointer circuitry comprising a register of elements each element occupying one of two possible states and each element associated with one of said stages, said elements residing in states which depend on which of said stages contain data words, said states being indicative of which stages are the next-to-be-loaded and the next-to-be-said next to be read and next to be loaded stages being specified by particular ones of said elements based on the states occupied by at least some of said elements.
Claim 2
Dependent Claim
228 words
Apparatus for controlling the loading into a data store of a sequence of data words and the reading from said data store of said data words in the same said sequence, said data store comprising a plurality of stages, said apparatus being arranged for determining the next-to-be-read and next-to-be-loaded stages of said data store comprising: pointer circuitry connected to specify the next-to-be-loaded one of said stages and to specify independently the next-to-be-read one of said stages, a loader responsive to said pointer circuitry and connected to enable loading said next data word in said sequence to be loaded, a reader responsive to said pointer circuitry and connected to enable reading, independently of said loader, said next data word in said sequence to be read, and pointer update circuitry for updating the status of said pointer circuitry after each said loading and after each said reading, said pointer circuitry comprising a register of elements each element occupying one of two possible states and each element associated with one of said stages, said elements residing in states which depend on which of said stages contain data words, said states being indicative of which stages are the next-to-be-loaded and the next-to-be-said next to be read and next to be loaded stages being specified by particular ones of said elements based on the states occupied by at least some of said elements.
Claim 3
Dependent Claim
139 words
The apparatus of claim 1 wherein said stages are arranged consecutively and said data words in said sequence are loaded respectively into consecutive said stages, and wherein said elements in said register are arranged effectively in a continuous ring, each of said elements being in a first state when the corresponding stage either contains a data word or immediately succeeds the stage containing the last loaded said data word, each of said elements otherwise being in a second state, whereby said next-to-be-loaded one of said stages is specified by the corresponding element which is in said first state when the next succeeding said element is in said second state, and said next-to-be-read one of said stages is specified by corresponding said element which is in said first state when the immediately preceding said element is in said second state.
Claim 4
Dependent Claim
21 words
The apparatus of claim 1 or 2 further comprising load timing circuitry connected to trigger said loader to enable said loading.
Claim 5
Dependent Claim
21 words
The apparatus of claim 1 or 2 further comprising read timing circuitry connected to trigger said reader to enable said reading.
Claim 6
Dependent Claim
22 words
The apparatus of claim 1 or 2 further comprising control circuitry connected to disable said loader when said data store is full.
Claim 7
Dependent Claim
24 words
The apparatus of claim 5 wherein said data store is treated as full when all but two of said stages contain said data words.
Claim 8
Dependent Claim
22 words
The apparatus of claim 1 or 2 further comprising control circuitry connected to disable said reader when said data store is empty.
Claim 9
Dependent Claim
87 words
The apparatus of claim 2 wherein said pointer update circuitry comprises load update circuitry responsive to the completion of said loading of each said data word and connected to cause the element succeeding said element which had specified said next-to-be-loaded one of said stages to change to said first state, and read update circuitry responsive to the completion of said reading of each said data word and connected to cause the element which had specified said next-to-be-read one of said stages to change to said second state.
Claim 10
Dependent Claim
68 words
Apparatus for indicating the level of occupancy of a data storage system having a sequence of stages, said apparatus comprising occupancy sensing circuitry responsive to said stages and connected to indicate whether or not different ones of said stages are occupied by data, and half-full flag circuitry responsive to said occupancy sensing circuitry and connected to indicate when at least half of said stages are occupied by data.
Claim 11
Dependent Claim
68 words
Apparatus for indicating the level of occupancy of a data storage system having a sequence of stages, said apparatus comprising occupancy sensing circuitry responsive to said stages and connected to indicate whether or not different ones of said stages are occupied by data, and half-full flag circuitry responsive to said occupancy sensing circuitry and connected to indicate when at least half of said stages are occupied by data.
Claim 12
Dependent Claim
96 words
The apparatus of claim 9 wherein said sequence is split into two sub-sequences having equal numbers of said stages, each said stage in each of said sub-sequences being associated with one of said stages of the other said sub-sequence, and said half-full flag circuitry comprises a plurality of half-full indicators, each of said indicators being associated with one of said stages in one of said sub-sequences and with the corresponding stage in the other said sub-sequence, each of said indicators being connected to provide an at-least-half-full signal when both of its associated said stages are occupied.
Claim 13
Dependent Claim
27 words
The apparatus of claim 9 further comprising: full flag circuitry responsive to said occupancy sensing circuitry and connected to indicate when all of said stages are occupied.
Claim 14
Dependent Claim
27 words
The apparatus of claim 9 further comprising empty flag circuitry responsive to said occupancy sensing circuitry and connected to indicate when all of said stages are unoccupied.
Claim 15
Dependent Claim
54 words
The apparatus of claim 11 wherein said full flag circuitry comprises a plurality of not-full indicators, each of said indicators being associated with one of said stages and with the preceding stage in said sequence, each of said indicators being connected to provide a not-full signal when both of said associated stages are unoccupied.
Claim 16
Dependent Claim
54 words
The apparatus of claim 12 wherein said empty flag circuitry comprises a plurality of not-empty indicators, each of said indicators being associated with one of said stages and with the preceding stage in said sequence, each of said indicators being connected to provide a not-empty signal when both of said associated stages are occupied.
Claim 17
Dependent Claim
70 words
A data store for first-in, first-out storage of a sequence of data words comprising a plurality of storage stages, linking circuitry for enabling different predetermined numbers of said storage stages to be available at different times for said storage of data, and size selector circuitry for causing said linking circuitry to enable a particular one of said predetermined numbers of said storage stages to be available at a particular time.
Claim 18
Dependent Claim
70 words
A data store for first-in, first-out storage of a sequence of data words comprising a plurality of storage stages, linking circuitry for enabling different predetermined numbers of said storage stages to be available at different times for said storage of data, and size selector circuitry for causing said linking circuitry to enable a particular one of said predetermined numbers of said storage stages to be available at a particular time.
Claim 19
Dependent Claim
65 words
The data store of claim 15 further comprising a sequence of enabling elements, each of said elements being associated with one of said stages for enabling the corresponding one of said stages to be loaded or read, said sequence being split into a first part and a second part, and wherein said linking circuitry selectably connects or disconnects said first part and said second part.
Claim 20
Dependent Claim
116 words
The apparatus of claim 16 wherein each of said first and second parts is split into a first subpart and a second subpart, said first subparts having equal numbers of said elements and said second subparts having equal numbers of said elements, and said linking circuitry further comprises four multiplexers, one of said multiplexers connecting each two of said subparts, said apparatus further comprising: occupancy sensing circuitry connected to indicate the occupied or unoccupied states of each of said stages, and half-full flag circuitry responsive to said occupancy sensing circuitry and connected to selectably indicate when at least half of said stages, or at least half of said stages associated with said first part, are occupied.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-12-04 | 1988-06-04 | 1988-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-12-04 | 1992-06-04 | 1992-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-12-04 | 1996-06-04 | 1996-12-04 | $7700.00 | Window Closed / Lapsed |