A-to-D Converter of the successive-approximation type

Claim 1

An analog-to-digital converter comprising a single monolithic chip formed with: a plurality of normal mode transistor current sources arranged to produce respective currents for summation into a composite signal; I 2 L inverted mode transistor means including logic circuit means defining successive-approximation control means arranged to carry out a successive-approximation algorithm; switch means comprising a series of individual switch circuits in the form of normal-mode transistors serving to selectively control the outputs of said current sources; said I 2 L inverted mode transistor means including clock means for supplying clock pulses to said logic circuit means to carry out said successive-approximation algorithm; said successive-approximation control means comprising a series of register stages which are activated in sequence as the algorithm proceeds; said register stages comprising I 2 L inverted mode transistors arranged as flip-flops; means connecting each of said individual switch circuits to a collector of one of said flip-flops without the interposition of level translators therebetween; the switch circuits being operable in sequence by the collector currents and connected to a corresponding current source to cause current from its source to be supplied to a summing point, whereby the combination of selected currents develops at said summing point said composite signal for comparison with an analog input signal.