← Back to Patent Explorer
US4043849A Expired / Lapsed US ⏱️ 0.0 years remaining

Planar diffusion method for an I2 L circuit including a bipolar analog circuit part

Assignee: ITT Inc
•
Filing: 1975-10-23
•
Granted: 1977-08-23
•
Expires: 1995-10-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract This relates to a method of producing a monolithic integrated I 2 L circuit including a bipolar analog circuit part. In order to realize good current gain values in the I 2 L transistors as well as high collector breakdown voltages in the analog circuit part, the base zone of the analog circuit part is prediffused prior to diffusion of the I 2 L base and injector regions. After such prediffusion, excessive doping material from the diffusion masking layer is removed and simultaneously windows in the diffusion mask over the I 2 L base and injector regions are opened. Next, doping material having a lower concentration than that which was used for the prediffusion of the analog base region is prediffused into the exposed regions of the substrate. This results in an expanded prediffused base region in the analog circuit part.

Inventors

  • 👤 Wolfgang Kraft
  • 👤 Lothar Blossfeld

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 07:35
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/17; H10P32/171; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/0116; H10D84/02; H10D84/03; H10D84/038; H10D84/60; H10D84/65; H10D84/658; H10P32/14; H10P32/1404; Y; Y10; Y10S; Y10S148/00; Y10S148/087

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 259 words
A planar diffusion method for the monolithic integration of an I 2 L circuit of the type including a bipolar analog circuit part including the steps of diffusing highly doped intermediate layers into a substrate, depositing an epitaxial layer on the surface of said substrate and said intermediate layers, producing an isolation region for insulating an I 2 L circuit part from a bipolar analog circuit part and depositing a diffusion masking layer on the surface of said epitaxial layer and said insulating region, comprising: opening windows in said masking layer over the base and injector regions of said I 2 L part and the base region of said bipolar analog circuit part; depositing a second masking layer in the windows over the base and injector regions of said I 2 L circuit part of such a thickness that during following treatment with an etching agent, the semiconductor material below said base and injector window is again exposed; prediffusing a first doping material of a first concentration into the remaining opening in said bipolar analog circuit part for forming a prediffused base region; removing excessive doping material from the diffusion masking layer and simultaneously exposing said substrate in the I 2 L circuit part base and injector regions; depositing a second doping material having a concentration of smaller than said first concentration on the exposed regions of said epitaxial layer; and simultaneously diffusing the base and injector regions of said I 2 L circuit part and the base region of said bipolar analog circuit part prior to emitter diffusion.
Claim 2
Dependent Claim 259 words
A planar diffusion method for the monolithic integration of an I 2 L circuit of the type including a bipolar analog circuit part including the steps of diffusing highly doped intermediate layers into a substrate, depositing an epitaxial layer on the surface of said substrate and said intermediate layers, producing an isolation region for insulating an I 2 L circuit part from a bipolar analog circuit part and depositing a diffusion masking layer on the surface of said epitaxial layer and said insulating region, comprising: opening windows in said masking layer over the base and injector regions of said I 2 L part and the base region of said bipolar analog circuit part; depositing a second masking layer in the windows over the base and injector regions of said I 2 L circuit part of such a thickness that during following treatment with an etching agent, the semiconductor material below said base and injector window is again exposed; prediffusing a first doping material of a first concentration into the remaining opening in said bipolar analog circuit part for forming a prediffused base region; removing excessive doping material from the diffusion masking layer and simultaneously exposing said substrate in the I 2 L circuit part base and injector regions; depositing a second doping material having a concentration of smaller than said first concentration on the exposed regions of said epitaxial layer; and simultaneously diffusing the base and injector regions of said I 2 L circuit part and the base region of said bipolar analog circuit part prior to emitter diffusion.
Claim 3
Dependent Claim 32 words
A planar diffusion method according to claim 1 further including the step of prediffusion prior to the deposition of said second doping material of said first conductivity type having a smaller concentration.
Claim 4
Dependent Claim 21 words
A planar diffusion method according to claim 1 wherein said doping material having said smaller concentration is deposited by ion implantation.
Claim 5
Dependent Claim 27 words
A planar diffusion method according to claim 2 wherein the doping material of said first concentration results in a surface resistance of 40 to 60Ω/□ following prediffusion.
Claim 6
Dependent Claim 27 words
A planar diffusion method according to claim 4 wherein the doping material of said second concentration results in a surface resistance of 65 to 110Ω/□ following prediffusion.
Claim 7
Dependent Claim 33 words
A planar diffusion method according to claim 5 wherein said epitaxial layer has a thickness and impurity concentration corresponding to a desired dielectric strength of the transistors of said bipolar analog circuit part.
Claim 8
Dependent Claim 19 words
A planar diffusion method according to claim 5 wherein said epitaxial layer has a thickness greater than 5 microns.
Claim 9
Dependent Claim 19 words
A planar diffusion method according to claim 7 wherein said epitaxial layer has a specific resistance higher than 1Ωcm.

References Cited (Backward Citations)

US3551221A Cited
US3655457A Cited
US3566218A Cited
US3560278A Cited
US3969748A Cited
US3928081A Cited
US3898107A Cited
US3933528A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-08-22 1981-02-21 1981-08-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-08-22 1985-02-21 1985-08-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-08-22 1989-02-21 1989-08-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag