US3855484A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic circuit arrangement
Assignee: US Philips Corp
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Filing: 1973-03-14
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Granted: 1974-12-17
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Expires: 1993-03-14
Abstract
Abstract The product of dissipation and delay time is often substantially constant in logic circuits. In the active state, a logic circuit has a higher switching speed and dissipation than in the nonactive state. The clock receives the same power supply so that the clock pulse frequency can be automatically adapted to the speed of the other components. Notably when use is made of integrated injection logic in portable apparatus, a saving can be achieved as regards consumption of battery energy, while the circuit itself is hardly more complex.
Inventors
- 👤 J Lagerberg
- 👤 Essen H Van
- 👤 A Slob
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:46
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3206; G06F1/3228; G06F1/04; G06F1/08; H; H03; H03B; H03B5/00; H03B5/02; H03B5/04; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/091; H10; H10D; H10D84/00; H10D84/60; H10D84/65
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
153 words
An integrated circuit arrangement for processing an information signal at a reduced power consumption comprising: a power supply; an injection logic circuit including logic gates, a clock for controlling the speed of operation of the gates, and connections for current sources for current injectors of the circuit; means for detecting signal transitions at the input of the circuit to provide a first control signal in response to the occurrence of the information signal and, respectively, a second control signal in response to the termination of the information signal at the input of the circuit; and control means connected between said power supply and said connections and controlled by said detecting means for setting the current of the current sources to a higher value in response to said first control signal and to a lower value in response to said second control signal, whereby the clock varies its frequency proportionally to the current value.
Claim 2
Dependent Claim
153 words
An integrated circuit arrangement for processing an information signal at a reduced power consumption comprising: a power supply; an injection logic circuit including logic gates, a clock for controlling the speed of operation of the gates, and connections for current sources for current injectors of the circuit; means for detecting signal transitions at the input of the circuit to provide a first control signal in response to the occurrence of the information signal and, respectively, a second control signal in response to the termination of the information signal at the input of the circuit; and control means connected between said power supply and said connections and controlled by said detecting means for setting the current of the current sources to a higher value in response to said first control signal and to a lower value in response to said second control signal, whereby the clock varies its frequency proportionally to the current value.
Claim 3
Dependent Claim
23 words
An integrated circuit arrangement as claimed in claim 1, wherein said second signal is capable of blocking the clock signals of the clock.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-12-16 | 1978-06-17 | 1978-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-12-16 | 1982-06-17 | 1982-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-12-16 | 1986-06-17 | 1986-12-17 | $7700.00 | Window Closed / Lapsed |