Process for producing a dielectric insulator separated substrate

Claim 2

In a process for producing a dielectric insulator separated substrate for semiconductor integrated circuits comprising preparing a composite which comprises a monocrystalline layer and a first polycrystalline film, having at least one polycrystalline layer, superposed through a dielectric film for electrically isolating therebetween, the first polycrystalline film having a thickness sufficient to support island regions to be formed therein, the improvement which comprises forming a lamination of second polycrystalline layers and second dielectric films interposed therebetween on the first polycrystalline film through a third dielectric film, each of said second polycrystalline layers having a thickness that is sufficiently thinner than that of said first polycrystalline film such that deformation of the substrate due to action of oxygen is avoided, and with the thickness of said lamination being capable of covering a machining tolerance for machining of the lamination to produce a flat surface thereon.

Claim 3

A process as defined in claim 1, wherein the thickness x(μm) of each of the second polycrystalline layers is represented by the formula: x≦y/40 where y represents the ultimate thickness (μm) of said substrate.

Claim 4

A process as defined in claim 1, wherein said second dielectric films are of silicon dioxide.

Claim 5

A process for producing a dielectric insulator separated substrate for semiconductor integrated circuits, which comprises the steps of: forming grooves in one face of a wafer of monocrystalline silicon to define island regions, covering the whole exposed surface of the one face with a first dielectric film for electric insulation, forming at least one first layer of polycrystalline silicon on said first dielectric film, said at least one first layer having a thickness sufficient to support said island regions, forming a lamination of second thin layers of polycrystalline silicon and second dielectric films, each second dielectric film being interposed between said second thin layers, on said first layer through a third dielectric film, each of said second thin layers having a thickness x(μm) represented by the formula: x≦y/40 where y(μm) is the ultimate thickness of the substrate, said lamination being sufficiently thick to cover a machining tolerance for machining the lamination, subjecting the lamination to machining to produce a flat surface without exposing the surface of said first layer, and subjecting the face of the monocrystalline silicon wafer opposite to said one face to machining to form said island regions each being surrounded by said polycrystalline silicon through said first dielectric film.

Claim 6

A process for producing a dielectric insulator separated substrate for semiconductor integrated circuits, which comprises the steps of: forming grooves in one face of a wafer of monocrystalline silicon to define island regions, covering the whole exposed surface of the one face with a first dielectric film for electric insulation, forming at least one first layer of polycrystalline silicon on said first dielectric film, said at least one first layer having a thickness sufficient to support said island regions, forming a lamination of second thin layers of polycrystalline silicon and second dielectric films, each second dielectric film being interposed between said second thin layers, on said first layer through a third dielectric film, each of said second thin layers having a thickness x(μm) represented by the formula: x≦y/40 where y(μm) is the ultimate thickness of the substrate, said lamination being sufficiently thick to cover a machining tolerance for machining the lamination, subjecting the lamination to machining to produce a flat surface without exposing the surface of said first layer, and subjecting the face of the monocrystalline silicon wafer opposite to said one face to machining to form said island regions each being surrounded by said polycrystalline silicon through said first dielectric film.

Claim 7

A process as defined in claim 4, wherein the number of said second thin layers is 3 to 8.

Claim 8

A process as defined in claim 4, wherein said first dielectric film is of silicon dioxide, silicon nitride, aluminium oxide or combination thereof.

Claim 9

A process as defined in claim 4, wherein said second dielectric films are of silicon dioxide, silicon nitride, aluminum oxide or combination thereof.

Claim 10

A process as defined in claim 1, wherein said first polycrystalline film is a lamination of a plurality of polycrystalline layers with dielectric films interposed between said polycrystalline layers.

Claim 11

A process as defined in claim 8, wherein each of said second polycrystalline layers has a thickness which is much thinner than the thickness of each of said plurality of polycrystalline layers.

Claim 12

A process as defined in claim 4, wherein said at least one first layer is a lamination of a plurality of polycrystalline silicon layers having dielectric films interposed between said polycrystalline silicon layers.

Claim 13

A process as defined in claim 4, wherein each of said second thin layers has a thickness which is sufficiently thinner than said at least one first layer such that deformation of the substrate due to action of oxygen is avoided.

Claim 14

A process as defined in claim 1, wherein said first polycrystalline film is a single polycrystalline layer.

Claim 15

A process as defined in claim 4, wherein said at least one first layer of polycrystalline silicon is a single polycrystalline silicon layer.

Claim 16

A process as defined in claim 1 or 4, wherein said lamination is sufficiently thick to cover a local difference in thickness of the substrate as well as the machining tolerance.