US3574007A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing improved mis transistor arrays
Assignee: Individual
•
Filing: 1967-07-19
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Granted: 1971-04-06
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Expires: 1987-07-19
Abstract
Abstract A PROCESS FOR PRODUCING A LARGE PLURALITY OF MIS DEVICES, WHICH MAY ALSO BE ASSOICATED WITH SIMULTANEOUSLY PRODUCED CIRCUIT, ELEMENTS TO FORM INTEGRATED CIRCUITS. A NON-SINGLE CRYSTAL SUBSTRATE RECEIVES A THIN LAYER OF SEMICONDUCTOR IN AN EPITAXIAL REACTOR, A THINNER LAYER OF A FIRST INSULATING MATERIAL, A THICKER LAYER OF A SECOND INSULATING MATERIAL, SELECTIVE ETCHING OF THESE INSULATING MATERIALS, THE FORMATION OF JUNCTIONS BY DIFFUSION THROUGH ETCHED AREAS, AND A METALLIC COATING DEPOSITED AND ETCHED TO PROVIDE CONNECTIONS. PLURAL REACTOR STEPS ARE SUCCESSIVELY TAKEN TO MINIMIZE CONTAMINATION OF THE PRODUCT.
Inventors
- 👤 Frances Hugle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 15:39
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D99/00; H10W; H10W74/00; H10W74/40; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/051; Y10S148/053; Y10S148/085; Y10S148/097; Y10S148/122; Y10S148/15; Y10S438/00; Y10S438/906
Claims Analysis
Total Claims: 0
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References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |