US4289978A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Complementary transistor inverting emitter follower circuit
Assignee: International Business Machines Corp
•
Filing: 1979-10-05
•
Granted: 1981-09-15
•
Expires: 1999-10-05
Abstract
Abstract A complementary bipolar transistor circuit characterized by low power dissipation and fast response for driving capacitive loads in response to input logic signals. An emitter follower series-connected pair of complementary transistors provide an output signal at the junction between their commonly connected emitters. The NPN transistor of the pair of transistors is directly driven by an input signal applied to its base. The PNP transistor of the pair of transistors is driven through a second series-connected NPN transistor and Schottky diode, the second NPN transistor base also receiving said input signal. The forward voltage of the Schottky diode is less than the V be of the PNP transistor. The PNP transistor nominally is held off and conducts only on negative-going input signal transitions to discharge the capacitive load. The NPN transistor of the pair of transitors conducts only on positive-going input signal transitions to charge the capacitive load. The circuit can be extended to perform NOR logic and to provide a pair of output signals in phase opposition to each other.
Inventors
- 👤 Richard R. Konian
- 👤 James L. Walsh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 00:47
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/66; H03K17/665; H03K17/666; H03K17/667; H03K19/00; H03K19/01; H03K19/013; H03K19/0136
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
156 words
A complementary emitter follower circuit comprising: a series connected first pair of bipolar complementary transistors, the emitters of said first pair of transistors being connected together and to an output terminal, a series-connected second transistor and Schottky diode, the bases of said second transistor and the transistor of said first pair of transistors of like kind being connected together and to an input terminal, the terminal of said Schottky diode remote from said second transistor being connected to the base of the other transistor of said first pair of transistors, a source of first voltage, the collector of said last-named transistor being directly connected to said source of first voltage, a resistor, the base of said last-named transistor being connected by said resistor to said source of first voltage, and a source of second voltage, the collectors of said second transistor and of said transistor of like kind being connected to said source of second voltage.
Claim 2
Dependent Claim
156 words
A complementary emitter follower circuit comprising: a series connected first pair of bipolar complementary transistors, the emitters of said first pair of transistors being connected together and to an output terminal, a series-connected second transistor and Schottky diode, the bases of said second transistor and the transistor of said first pair of transistors of like kind being connected together and to an input terminal, the terminal of said Schottky diode remote from said second transistor being connected to the base of the other transistor of said first pair of transistors, a source of first voltage, the collector of said last-named transistor being directly connected to said source of first voltage, a resistor, the base of said last-named transistor being connected by said resistor to said source of first voltage, and a source of second voltage, the collectors of said second transistor and of said transistor of like kind being connected to said source of second voltage.
Claim 3
Dependent Claim
144 words
A complementary emitter follower circuit comprising: a series connected first pair of bipolar complementary transistors, the emitters of said first pair of transistors being connected together and to an output terminal, a series-connected second NPN transistor and Schottky diode, the bases of said second NPN transistor and the NPN transistor of said first pair of transistors being connected together and to an input terminal, the anode of said Schottky diode being connected to the base of the PNP transistor of said first pair of transistors, a source of negative voltage, the collector of said last-named transistor being directly connected to said source of negative voltage, a resistor, the base of said last-named transistor being connected by said resistor to said source of negative voltage, and a source of positive voltage, the collectors of said NPN transistors being connected to said source of positive voltage.
Claim 4
Dependent Claim
144 words
A complementary emitter follower circuit comprising: a series connected first pair of bipolar complementary transistors, the emitters of said first pair of transistors being connected together and to an output terminal, a series-connected second NPN transistor and Schottky diode, the bases of said second NPN transistor and the NPN transistor of said first pair of transistors being connected together and to an input terminal, the anode of said Schottky diode being connected to the base of the PNP transistor of said first pair of transistors, a source of negative voltage, the collector of said last-named transistor being directly connected to said source of negative voltage, a resistor, the base of said last-named transistor being connected by said resistor to said source of negative voltage, and a source of positive voltage, the collectors of said NPN transistors being connected to said source of positive voltage.
Claim 5
Dependent Claim
16 words
The circuit defined in claim 2 wherein said output terminal is connected to a capacitive load.
Claim 6
Dependent Claim
37 words
The circuit defined in claim 3 and further including a multiple input current switch circuit providing a first output in response to a plurality of input logic signals, said first output being applied to said input terminal.
Claim 7
Dependent Claim
25 words
The circuit defined in claim 4 wherein said current switch circuit also provides a second output in phase opposition with respect to said first output.
Claim 8
Dependent Claim
32 words
The circuit defined in claim 5 and further including another circuit identical to the circuit defined in claim 1, said second output being applied to the input terminal of said another circuit.
Claim 9
Dependent Claim
21 words
The combination defined in claim 6 wherein the output terminal of said another circuit is connected to a second capacitive load.
References Cited (Backward Citations)
US3433978A
Cited
US3458719A
Cited
US3509363A
Cited
US3614467A
Cited
US3798471A
Cited
US3854057A
Cited
US4053792A
Cited
US3987310A
Cited
US4006365A
Cited
US4045689A
Cited
US4065678A
Cited
US4064405A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-09-14 | 1985-03-16 | 1985-09-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-09-14 | 1989-03-16 | 1989-09-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-09-14 | 1993-03-16 | 1993-09-15 | $7700.00 | Window Closed / Lapsed |