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US3987310A Expired / Lapsed US ⏱️ 0.0 years remaining

Schottky diode - complementary transistor logic

Assignee: Motorola Solutions Inc
•
Filing: 1975-06-19
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Granted: 1976-10-19
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Expires: 1995-06-19
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Abstract

Abstract A logic circuit uses an input Schottky diode of a first threshold and a clamp Schottky diode of a second threshold in combination with a high speed NPN switching transistor to form a simple high speed logic element. The novel use of two Schottky diodes of different threshold voltages provides a logic gate with a lower logic swing amenable with higher speed operation. Further, the operation of the logic gate is independent of the temperature characteristics of the NPN switching transistor. A PNP current source provides the drive current and load current for the logic gate in a simple manner which uses minimum chip area.

Inventors

  • 👤 Arthur William Peltier
  • 👤 Leo L. Wisseman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 02:50
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/01; H03K19/013

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 165 words
a semiconductor integrated logic circuit comprising: a. a first and a second power supply conductor; b. a first reference voltage means; c. a NPN switching transistor having an emitter coupled to said first power supply conductor, having a collector forming the output terminal of said logic circuit and having a base; d. a first Schottky diode having an anode and a cathode and having a first threshold votlage, said anode connected to said base of said NPN transistor and said cathode connected to said collector of said NPN transistor; e. a second Schottky diode having an anode and a cathode and having a second threshold voltage, said anode connected to the base of said NPN transistor and said cathode forming an input terminal of said logic circuit; and f. a first PNP current source transistor having an emitter coupled to said second power supply conductor, a base coupled to said first reference voltage means and a collector coupled to the base of said NPN transistor.
Claim 2
Dependent Claim 165 words
a semiconductor integrated logic circuit comprising: a. a first and a second power supply conductor; b. a first reference voltage means; c. a NPN switching transistor having an emitter coupled to said first power supply conductor, having a collector forming the output terminal of said logic circuit and having a base; d. a first Schottky diode having an anode and a cathode and having a first threshold votlage, said anode connected to said base of said NPN transistor and said cathode connected to said collector of said NPN transistor; e. a second Schottky diode having an anode and a cathode and having a second threshold voltage, said anode connected to the base of said NPN transistor and said cathode forming an input terminal of said logic circuit; and f. a first PNP current source transistor having an emitter coupled to said second power supply conductor, a base coupled to said first reference voltage means and a collector coupled to the base of said NPN transistor.
Claim 3
Dependent Claim 41 words
A semiconductor integrated logic circuit as recited in claim 1 further comprising a current limiting resistor having a first terminal coupled to said second power supply conductor and a second terminal coupled to said emitter of said PNP current source transistor.
Claim 4
Dependent Claim 45 words
A semiconductor integrated logic circuit as recited in claim 2 further comprising a third Schottky diode having said second threshold voltage and having an anode coupled to the base of said NPN transistor and a cathode forming a second input terminal of said logic circuit.
Claim 5
Dependent Claim 21 words
A semiconductor integrated logic circuit as recited in claim 2 further comprising active pull-up circuit means coupled to said output terminal.
Claim 6
Dependent Claim 71 words
A semiconductor integrated circuit as recited in claim 4 wherein said active pull-up circuit means comprises: a. a second reference voltage means coupled between said output terminal and said first power supply conductor; and b. a second PNP current source transistor having a collector coupled to said output terminal, an emitter coupled to said second terminal of said current limiting resistor and a base coupled to said first reference voltage means.
Claim 7
Dependent Claim 21 words
a semiconductor integrated logic circuit as recited in claim 5 wherein said second voltage reference means comprises serially interconnected Schottky diodes.
Claim 8
Dependent Claim 20 words
a semiconductor integrated circuit as recited in claim 2 wherein said first voltage reference means comprises serially interconnected Schottky diodes.
Claim 9
Dependent Claim 43 words
A semiconductor integrated logic circuit as recited in claim 2 where the difference between the logic 1 level and the logic 0 level produced at said output terminal is equal to the difference between the first threshold voltage and said second threshold voltage.
Claim 10
Dependent Claim 25 words
a semiconductor integrated logic circuit as recited in claim 2 wherein said first threshold is about 500 millivolts and second threshold is about 100 millivolts.
Claim 11
Dependent Claim 51 words
A semiconductor integrated logic circuit as recited in claim 2 wherein said circuit is a silicon semiconductor integrated circuit, said first Schottky diode is a barrier metal diode whose barrier metal is platinum silicide, and said second Schottky diode is a barrier metal diode whose barrier metal is tungsten or titanium.

References Cited (Backward Citations)

US3349297A Cited
US3719797A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-10-19 1980-04-19 1980-10-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-10-19 1984-04-19 1984-10-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-10-19 1988-04-19 1988-10-19 $7700.00 Window Closed / Lapsed

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