Patent US4285780A successfully refreshed from Google Patents.
US4285780A
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Method of making a multi-level circuit board
Assignee: Individual
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Filing: 1978-11-02
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Granted: 1981-08-25
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Expires: 1998-11-02
Abstract
Abstract A multi-level printed circuit board with at least two levels of circuitry. A substrate has a first level of circuitry, an insulating covering or layer over the entire surface of the substrate and the circuitry except in first predetermined areas, a second level of circuitry is formed over said insulating covering or layer and metallurgically bonded to form electrically conductive joints at the predetermined uncovered areas with the first level of circuitry. The method of making a multi-level printed circuit board comprises the steps of forming at least one level of circuitry on at least one side of a substrate, applying an insulating covering or layer over the entire surface of the substrate and circuitry except in a first number of predetermined areas, forming a thin adherent conductive coating over all exposed surfaces, applying a temporary mask over the conductive coating except in second predetermined areas which define the second level of circuitry on the side of said substrate, forming copper circuitry in said second predetermined areas, and removing the temporary mask and said adherent conductive coating. The formation of the second level of circuitry is repeated for as many levels as is desired, and levels of circuitry may be formed on both sides of the substrate. A final level of circuitry is formed and is covered by a final insulating coating except in final predetermined areas.
Inventors
- 👤 Herbert I. Schachter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 07:03
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/40; H05K3/42; H05K3/429; H05K3/423; H05K3/46; H05K3/4602; H05K2201/00; H05K2201/09; H05K2201/09009; H05K2201/091; H05K2201/09145; H05K2201/092; H05K2201/09209; H05K2201/095; H05K2201/096; H05K2201/09818; H05K2201/09845; H05K2203/00; H05K2203/07; H05K2203/0703; H05K2203/0733; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/10; H05K3/108; H05K3/18; H05K3/181; H05K3/22; H05K3/28; H05K3/425; H05K3/428; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
155 words
A method for making a multi-level printed circuit board comprising the steps of: forming a first level of circuitry on at least one side of a substrate, applying an insulating covering or layer over the entire surface of said substrate and circuitry except in certain locations where no covering or layer is applied so as to define a first number of predetermined areas, forming a thin adherent conductive coating over all exposed surfaces, applying a temporary mask over the conductive coating except in a second number of predetermined areas, which define a circuit pattern on a second level on said side of said substrate, forming in one step both copper conductive areas including at least some copper circuitry in said second predetermined areas, and where said predetermined areas at any level are coincidental, metallurgical bonds creating interconnections between levels of circuitry; and removing said temporary mask and said adherent conductive coating directly underlying said mask.
Claim 2
Independent Claim
155 words
A method for making a multi-level printed circuit board comprising the steps of: forming a first level of circuitry on at least one side of a substrate, applying an insulating covering or layer over the entire surface of said substrate and circuitry except in certain locations where no covering or layer is applied so as to define a first number of predetermined areas, forming a thin adherent conductive coating over all exposed surfaces, applying a temporary mask over the conductive coating except in a second number of predetermined areas, which define a circuit pattern on a second level on said side of said substrate, forming in one step both copper conductive areas including at least some copper circuitry in said second predetermined areas, and where said predetermined areas at any level are coincidental, metallurgical bonds creating interconnections between levels of circuitry; and removing said temporary mask and said adherent conductive coating directly underlying said mask.
Claim 3
Dependent Claim
36 words
The method according to claim 1, further comprising forming additional levels of conductive areas and copper circuitry by the same technique that the second level of circuitry is formed; thereby sequentially forming additional levels of circuitry.
Claim 4
Dependent Claim
95 words
The method according to claim 2, wherein said conductive areas comprise terminal pads in said circuit board, and said method including for one or more levels of circuitry the additional step of applying an optional temporary mask over said temporary mask so as to only expose the terminal pads but not the copper circuitry, thereby permitting the further build up of the copper to a predetermined desired level, whereby said copper may be built up flush with the remaining portion of the copper circuitry and whereby any depression formed around said terminal pads is alleviated.
Claim 5
Dependent Claim
27 words
The method according to claim 3, wherein for each level of circuitry said optional temporary mask is removed at the time the first temporary mask is removed.
Claim 6
Independent Claim
203 words
A method for making a multi-level printed circuit board comprising the steps of: forming a first level of circuitry on each side of a substrate, applying an insulating covering or layer over the entire surface of each side of said substrate and circuitry except in certain locations where no covering or layer is applied so as to define predetermined areas on each side thereof to expose a portion of the underlying circuitry for each of said sides of said substrate, forming a thin adherent conductive coating over said insulating covering or layer and the exposed underlying circuitry on each side of the substrate, applying a temporary mask over the conductive coating except in second predetermined areas, which define a circuit pattern on a second level on said sides of said substrate at this intermediate stage of production, forming in one step both copper conductive areas including at least some copper circuitry in said second predetermined areas on each of said sides, and where said predetermined areas at any level on either side of said substrate are coincidental, metallurgical bonds creating interconnections between levels of circuitry on each side thereof, and removing said temporary mask and said adherent conductive coating directly underlying said mask.
Claim 7
Independent Claim
203 words
A method for making a multi-level printed circuit board comprising the steps of: forming a first level of circuitry on each side of a substrate, applying an insulating covering or layer over the entire surface of each side of said substrate and circuitry except in certain locations where no covering or layer is applied so as to define predetermined areas on each side thereof to expose a portion of the underlying circuitry for each of said sides of said substrate, forming a thin adherent conductive coating over said insulating covering or layer and the exposed underlying circuitry on each side of the substrate, applying a temporary mask over the conductive coating except in second predetermined areas, which define a circuit pattern on a second level on said sides of said substrate at this intermediate stage of production, forming in one step both copper conductive areas including at least some copper circuitry in said second predetermined areas on each of said sides, and where said predetermined areas at any level on either side of said substrate are coincidental, metallurgical bonds creating interconnections between levels of circuitry on each side thereof, and removing said temporary mask and said adherent conductive coating directly underlying said mask.
Claim 8
Dependent Claim
37 words
The method according to claim 5, further comprising forming additional levels of conductive areas and circuitry by the same technique that the said second level of circuitry is formed, thereby sequentially forming said additional levels of circuitry.
Claim 9
Dependent Claim
135 words
The method according to claim 1 or 5, further comprising the steps of providing at least one hole in said multi-level circuit board in at least one of the conductive areas where circuit level to circuit level connections are desired between a plurality of circuit levels, applying an insulating covering or layer except in further predetermined areas, forming a thin adherent conductive coating over all exposed surfaces including the inside of any said hole provided in said multi-level circuit board, applying a temporary mask over the conductive coating except in still further predetermined areas which define the final level of circuitry on at least one of said sides of the multi-level circuit board, removing said temporary mask and said adherent conductive coating, and applying a final insulating coating except in yet still further predetermined areas.
Claim 10
Dependent Claim
20 words
The method according to claim 7, including the step of applying a final finish to said final level of circuitry.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-08-24 | 1985-02-23 | 1985-08-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-08-24 | 1989-02-23 | 1989-08-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-08-24 | 1993-02-23 | 1993-08-25 | $7700.00 | Window Closed / Lapsed |