Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
112 words
Apparatus for converting a first pulse pattern into any one of a plurality of second pulse patterns, comprising: (a) means for generating one of the second pulse patterns in response to pulses of the first pulse pattern; said generating means including, first counter means for counting pulses of the desired one of the second pulse patterns, second counter means for counting pulses of the first pulse pattern, and means for comparing the count of said first counter means and said second counter means to provide the desired one of the second pulse patterns; and (b) adjustable means for controlling said generating means to generate any desired one of the second pulse patterns.
Claim 2
Dependent Claim
112 words
Apparatus for converting a first pulse pattern into any one of a plurality of second pulse patterns, comprising: (a) means for generating one of the second pulse patterns in response to pulses of the first pulse pattern; said generating means including, first counter means for counting pulses of the desired one of the second pulse patterns, second counter means for counting pulses of the first pulse pattern, and means for comparing the count of said first counter means and said second counter means to provide the desired one of the second pulse patterns; and (b) adjustable means for controlling said generating means to generate any desired one of the second pulse patterns.
Claim 3
Dependent Claim
75 words
Apparatus according to claim 1 wherein said adjustable means comprises: (a) first means for dividing the pulses of the desired one of the second pulse patterns by a predetermined number to provide first output pulses, said first counter means counting the first output pulses; and (b) second means for dividing the pulses of the first pulse pattern by a predetermined number to provide second output pulses, said second counter means counting the second output pulses.
Claim 4
Dependent Claim
103 words
Apparatus according to claim 2 wherein said first and second counter means said comparing means, and said first and second dividing means are arranged to provide any one of the second pulse patterns in accordance with the equation: ##EQU8## where a is the division number of said first dividing means, b is the division number of said second dividing means, [b(i-1)+1] is the spacing between pulses of the desired one of the second pulse patterns for any given value i where i=1, 2, 3, . . . n, and a is the number of times the pulse spacing is repeated for value i.
Claim 5
Dependent Claim
22 words
Apparatus according to claim 2 wherein said first means for dividing and said second means for dividing each comprises a presettable counter.
Claim 6
Dependent Claim
35 words
Apparatus according to claim 1 wherein said second counter means comprises: (a) a counter; and (b) means for resetting said counter in response to the pulses of the desired one of the second pulse patterns.
Claim 7
Dependent Claim
138 words
Apparatus for generating a plurality of nonlinear pulse patterns from a linear pulse pattern, comprising: (a) means for generating first pulses of the linear pulse pattern; (b) means for gating the first pulses to produce secnd pulses of one of the nonlinear pulse patterns; (c) first adjustable means for dividing the second pulses by a predetermined number a to produce third pulses; (d) first counter means for counting the third pulses; (e) second adjustable means for dividing the first pulses of the linear pulse pattern by a predetermined number b to produce fourth pulses; (f) second counter means for counting the fourth pulses and being reset by the second pulses; and (g) means for comparing the count of said first counter means and said second counter means and for enabling said gating means in response to equal counts.
Claim 8
Dependent Claim
138 words
Apparatus for generating a plurality of nonlinear pulse patterns from a linear pulse pattern, comprising: (a) means for generating first pulses of the linear pulse pattern; (b) means for gating the first pulses to produce secnd pulses of one of the nonlinear pulse patterns; (c) first adjustable means for dividing the second pulses by a predetermined number a to produce third pulses; (d) first counter means for counting the third pulses; (e) second adjustable means for dividing the first pulses of the linear pulse pattern by a predetermined number b to produce fourth pulses; (f) second counter means for counting the fourth pulses and being reset by the second pulses; and (g) means for comparing the count of said first counter means and said second counter means and for enabling said gating means in response to equal counts.
Claim 9
Dependent Claim
20 words
Apparatus according to claim 6 wherein said first adjustable means and said second adjustable means each comprises a presettable counter.
Claim 10
Dependent Claim
77 words
Apparatus according to claim 6 wherein said means for comparing and enabling comprises: (a) a comparator having inputs coupled to said first counter means and said second counter means, respectively, and providing output pulses in response to the equal counts; and (b) delay means for delaying the output pulses to enable said gating means to gate a pulse of the linear pulse pattern following a pulse of the linear pulse pattern producing one of the equal counts.
Claim 11
Dependent Claim
81 words
Apparatus for converting a first pulse pattern into a second pulse pattern, comprising: (a) shift register means for generating first digital signals representing a logarithmic pattern to a predetermined base; (b) means for counting the pulses of the first pattern and generating second digital signals representing a count; and (c) means for comparing the first digital signals and the second digital signals and for producing the second pulse pattern in response to the second digital signal equaling the first digital signals.
Claim 12
Dependent Claim
81 words
Apparatus for converting a first pulse pattern into a second pulse pattern, comprising: (a) shift register means for generating first digital signals representing a logarithmic pattern to a predetermined base; (b) means for counting the pulses of the first pattern and generating second digital signals representing a count; and (c) means for comparing the first digital signals and the second digital signals and for producing the second pulse pattern in response to the second digital signal equaling the first digital signals.
Claim 13
Dependent Claim
31 words
Apparatus according to claim 9 wherein said shift register means comprises: (a) a shift register; and (b) means for clocking said shift register with each pulse of the second pulse pattern.
Claim 14
Dependent Claim
15 words
Apparatus according to claim 9 wherein said shift register means comprises a binary shift register.
Claim 15
Dependent Claim
44 words
Apparatus according to claim 9 wherein said shift register means comprises: (a) a binary shift register; and (b) means for connecting said binary shift register to said comparing means to generate a logarithmic pulse pattern to a base other than the log base 2.
Claim 16
Dependent Claim
110 words
A logarithmic pulse generating comprising: (a) means for generating a linear pulse pattern; (b) a shift register for generating first digital signals representing a logarithmic pattern; (c) a counter for counting the pulses of the linear pulse pattern and generating second digital signals representing a count; (d) a comparator for comparing said second digital signals and said first digital signals and generating a comparison signal; (e) means for gating the pulses of said linear pulse pattern in response to the comparison signal to provide an output logarithmic pulse pattern; and (f) means for clocking said shift register and resetting said counter with the pulses of said output logarithmic pulse pattern.
Claim 17
Dependent Claim
110 words
A logarithmic pulse generating comprising: (a) means for generating a linear pulse pattern; (b) a shift register for generating first digital signals representing a logarithmic pattern; (c) a counter for counting the pulses of the linear pulse pattern and generating second digital signals representing a count; (d) a comparator for comparing said second digital signals and said first digital signals and generating a comparison signal; (e) means for gating the pulses of said linear pulse pattern in response to the comparison signal to provide an output logarithmic pulse pattern; and (f) means for clocking said shift register and resetting said counter with the pulses of said output logarithmic pulse pattern.
Claim 18
Dependent Claim
84 words
Apparatus for converting a first pulse pattern into a second logarithmic pulse pattern, comprising: (a) memory means for storing and outputting first digital signals representing a logarithmic pattern to a predetermined base; (b) means for counting the pulses of the first pattern and generating second digital signals representing a count; and (c) means for comparing the first digital signals and the second digital signals and for producing the second logarithmic pulse pattern in response to the second digital signals equaling the first digital signals.
Claim 19
Dependent Claim
84 words
Apparatus for converting a first pulse pattern into a second logarithmic pulse pattern, comprising: (a) memory means for storing and outputting first digital signals representing a logarithmic pattern to a predetermined base; (b) means for counting the pulses of the first pattern and generating second digital signals representing a count; and (c) means for comparing the first digital signals and the second digital signals and for producing the second logarithmic pulse pattern in response to the second digital signals equaling the first digital signals.
Claim 20
Dependent Claim
26 words
Apparatus according to claim 14 wherein said memory means comprises: (a) a memory for storing said first digital signals; and (b) means for addressing said memory.
Claim 21
Dependent Claim
32 words
Apparatus according to claim 15 wherein said means for addressing comprises: (a) an address counter; and (b) means for clocking said address counter with the pulses of the second logarithmic pulse pattern.
Claim 22
Dependent Claim
12 words
Apparatus according to claim 15 wherein said memory is a read-only memory.
Claim 23
Dependent Claim
11 words
Apparatus according to claim 17 wherein said read-only memory is programmable.
Claim 24
Dependent Claim
13 words
Apparatus according to claim 15 wherein said memory is a random access memory.