← Back to Patent Explorer
US4089060A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital logarithmic apparatus

Assignee: Individual
•
Filing: 1976-10-15
•
Granted: 1978-05-09
•
Expires: 1996-10-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Digital apparatus for approximating the logarithmic equation of the form: X= W Log z (Y)+ K where W and K are selected constants, employs basically a three counter, one comparator logarithmic digital calculator assembly. A source provides a selected train of time spaced pulses to a divide by N counter, which drives a first counter. The clock pulses also go to a second counter. The comparator at each clock pulse compares the counts of the first and second counters. If the count of the second counter is greater than that of the first counter, an output pulse is produced, which resets the second counter and including an output circuit.

Inventors

  • 👤 Donald K. Mitchell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:40
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/62

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 172 words
Digital electronic apparatus having an input adapted to receive electrical pulses, and having an output for delivering electrical pulses, in which the number of output pulses X is approximately related to the number of input pulses Y in accordance with an equation of the form; X = W Log.sub.z (Y) + K where W and K are numerical constants, comprising: (a) a source of electrical pulses; (b) said source connected to the input of a dividing counter; (c) said dividing counter on its output connected to a first counter, said first counter incremented by one pulse for each N pulses to said dividing counter; (d) said source connected also to a second counter; (e) comparator means to compare the counts of said first and second counter, and means responsive to said comparator means to generate an output pulse (on) when the count of said second counter is at least equal to the count of said first counter, and (f) means responsive to each output pulse to reset said second counter to zero.
Claim 2
Dependent Claim 172 words
Digital electronic apparatus having an input adapted to receive electrical pulses, and having an output for delivering electrical pulses, in which the number of output pulses X is approximately related to the number of input pulses Y in accordance with an equation of the form; X = W Log.sub.z (Y) + K where W and K are numerical constants, comprising: (a) a source of electrical pulses; (b) said source connected to the input of a dividing counter; (c) said dividing counter on its output connected to a first counter, said first counter incremented by one pulse for each N pulses to said dividing counter; (d) said source connected also to a second counter; (e) comparator means to compare the counts of said first and second counter, and means responsive to said comparator means to generate an output pulse (on) when the count of said second counter is at least equal to the count of said first counter, and (f) means responsive to each output pulse to reset said second counter to zero.
Claim 3
Dependent Claim 19 words
The apparatus as in claim 1 including a first preset counter which receives each pulse outputed by said comparator.
Claim 4
Dependent Claim 27 words
The apparatus as in claim 2 including means responsive to the count of said first preset counter to disconnect said source of pulses from said digital apparatus.
Claim 5
Dependent Claim 25 words
The apparatus as in claim 1 including means to count the pulses delivered by said source and by said comparator during a selected time period.
Claim 6
Dependent Claim 45 words
The apparatus as in claim 2 including second preset counter means connected to said source, and means responsive to said second preset counter to hold said second counter and said first preset counter in reset condition until said second preset counter reaches its preset value.

References Cited (Backward Citations)

US3436533A Cited
US3662163A Cited
US3673391A Cited
US3821524A Cited
US3943342A Cited
US3956616A Cited
US3988600A Cited
US3991301A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-05-08 1981-11-07 1982-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-05-08 1985-11-07 1986-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-05-08 1989-11-07 1990-05-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag