Patent US3946254A successfully refreshed from Google Patents.
US3946254A
Expired / Lapsed
US
⏱️ 0.0 years remaining
No-bounce electronically controlled switch circuit
Assignee: Unisys Corp
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Filing: 1974-08-02
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Granted: 1976-03-23
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Expires: 1994-08-02
Abstract
Abstract An electronically controlled switch circuit for providing a single noise-free output pulse from the output of a modified master-slave flip flop circuit in response to an input signal alternately applied to set and clock pulse inputs from the output of a single pole double throw switch coupled therebetween.
Inventors
- 👤 Lawrence A. Millben
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:50
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/01; H03K3/013; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/289
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
257 words
A circuit for producing a single noise-free output pulse of a predetermined logic state in response to actuation of bi-positionable switch means for alternately supplying an electrical reference signal from one switch position to the other switch position, comprising: a first flip-flop including input means, output means, and means responsive to the electrical reference signal supplied to the one position of said bi-positionable switch means for setting the logic state of said first flip-flop output means to a predetermined logic state; a second flip-flop including output means coupled to said first flip-flop logic state setting means for maintaining a first predetermined logic state at said second flip-flop output means only while said bi-positionable switch means remains at said one switch position and input means responsive to the predetermined logic state of said first flip-flop output means for establishing a second predetermined logic state at said second flip-flop output means during actuation of said bi-positionable switch means toward the other switch position; means for coupling said second flip-flop output means with said first flip-flop input means for reversing the set predetermined logic state of the first flip-flop output means in response to the established second predetermined logic state at said second flip-flop output means only upon arrival of said bi-positionable switch means at said other switch position; and means for preventing said second flip-flop from reversing said established second predetermined logic state at said second flip-flop output means to said first maintained predetermined logic state while said first flip-flop output means is in said set predetermined logic state.
Claim 2
Dependent Claim
257 words
A circuit for producing a single noise-free output pulse of a predetermined logic state in response to actuation of bi-positionable switch means for alternately supplying an electrical reference signal from one switch position to the other switch position, comprising: a first flip-flop including input means, output means, and means responsive to the electrical reference signal supplied to the one position of said bi-positionable switch means for setting the logic state of said first flip-flop output means to a predetermined logic state; a second flip-flop including output means coupled to said first flip-flop logic state setting means for maintaining a first predetermined logic state at said second flip-flop output means only while said bi-positionable switch means remains at said one switch position and input means responsive to the predetermined logic state of said first flip-flop output means for establishing a second predetermined logic state at said second flip-flop output means during actuation of said bi-positionable switch means toward the other switch position; means for coupling said second flip-flop output means with said first flip-flop input means for reversing the set predetermined logic state of the first flip-flop output means in response to the established second predetermined logic state at said second flip-flop output means only upon arrival of said bi-positionable switch means at said other switch position; and means for preventing said second flip-flop from reversing said established second predetermined logic state at said second flip-flop output means to said first maintained predetermined logic state while said first flip-flop output means is in said set predetermined logic state.
Claim 3
Dependent Claim
27 words
The circuit of claim 1 wherein said preventing means comprises gate means for coupling said first flip flop output means with said second flip flop input means.
Claim 4
Dependent Claim
21 words
The circuit of claim 2 wherein said gate means comprises means for connecting to said other position of said bi-positionable switch.
Claim 5
Dependent Claim
245 words
An electronically controlled switch for producing a noise-free output pulse of a predetermined logic state, comprising: an input master flip-flop circuit including a master flip-flop output; a slave flip-flop circuit including two slave flip-flop outputs having two oppositely oriented output states; a current steering circuit; a coupling circuit responsive to the master flip-flop output and said current steering circuit for coupling the output of said input master flip-flop circuit with said slave flip-flop circuit for reversing said oppositely oriented output states; and a switch having one input connected to an electrical reference, two switch outputs and means for alternately supplying said electrical reference from said switch input to one of said two switch outputs, one of said switch outputs connected to said slave flip-flop circuit for establishing predetermined oppositely oriented logic states at said two slave flip-flop outputs in response to said electrical reference being supplied to said one switch output, and said one switch output also coupled to said master flip-flop output of maintaining said master flip-flop output substantially at said electrical reference only while said electrical reference is supplied to said one switch output thereby disabling said coupling and current steering circuits, the other switch output coupled to said current steering circuit for enabling said coupling circuit to couple said master flip-flop output with said slave flip-flop circuit for reversing the established oppositely oriented states of said two slave flip-flop outputs in response to supplying said electrical reference to said other switch output.
Claim 6
Dependent Claim
245 words
An electronically controlled switch for producing a noise-free output pulse of a predetermined logic state, comprising: an input master flip-flop circuit including a master flip-flop output; a slave flip-flop circuit including two slave flip-flop outputs having two oppositely oriented output states; a current steering circuit; a coupling circuit responsive to the master flip-flop output and said current steering circuit for coupling the output of said input master flip-flop circuit with said slave flip-flop circuit for reversing said oppositely oriented output states; and a switch having one input connected to an electrical reference, two switch outputs and means for alternately supplying said electrical reference from said switch input to one of said two switch outputs, one of said switch outputs connected to said slave flip-flop circuit for establishing predetermined oppositely oriented logic states at said two slave flip-flop outputs in response to said electrical reference being supplied to said one switch output, and said one switch output also coupled to said master flip-flop output of maintaining said master flip-flop output substantially at said electrical reference only while said electrical reference is supplied to said one switch output thereby disabling said coupling and current steering circuits, the other switch output coupled to said current steering circuit for enabling said coupling circuit to couple said master flip-flop output with said slave flip-flop circuit for reversing the established oppositely oriented states of said two slave flip-flop outputs in response to supplying said electrical reference to said other switch output.
Claim 7
Dependent Claim
30 words
The circuit of claim 1 wherein said coupling means comprises a current steering circuit, and a coupling circuit responsive to said second flip-flop output means and said current steering circuit.
Claim 8
Dependent Claim
28 words
The curcuit of claim 5 wherein said coupling circuit comprises common emitter transistor circuit means disposed between said first flip-flop input means and said second flip-flop output means.
Claim 9
Dependent Claim
29 words
The circuit of claim 6 wherein said current steering circuit comprises transistor means disposed between said common emitter transistor circuit means and said other position of said bi-positionable switch.
Claim 10
Dependent Claim
13 words
The circuit of claim 1 wherein said electrical reference signal is electrical ground.
Claim 11
Dependent Claim
30 words
The electronically controlled switch of claim 4 further comprising means for preventing said master flip-flop output from changing logic state while said slave flip-flop outputs are in said reversed states.
Claim 12
Dependent Claim
14 words
The electronically controlled switch of claim 9 wherein said electrical reference is electrical ground.
References Cited (Backward Citations)
US3247399A
Cited
US3471789A
Cited
US3508079A
Cited
US3553497A
Cited
US3593036A
Cited
US3624518A
Cited
US3725680A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-03-23 | 1979-09-22 | 1980-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-03-23 | 1983-09-22 | 1984-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-03-23 | 1987-09-22 | 1988-03-23 | $7700.00 | Window Closed / Lapsed |